Texas Instruments SN74ALS29841DW, SN74ALS29841NT Datasheet
SN74ALS29841
10-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SDAS149A – JUNE 1988 – REVISED JANUARY 1995
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• Provides Extra Bus-Driving Latches
Necessary for Wider Address/Data Paths or
Buses With Parity
• Buffered Control Inputs Reduce dc Loading
Effects
• Power-Up High-Impedance State
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
description
DW OR NT PACKAGE
(TOP VIEW)
OE
1
24
1D
2
23
2D
3
22
3D
4
21
4D
5
20
5D
6
19
6D
7
18
7D
8
17
8D
9
16
9D
10
15
10D
11
14
GND
12
13
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
LE
This 10-bit latch features 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for
implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS29841 has noninverting data (D) inputs.
A buffered output-enable (OE
) input can place the ten outputs in either a normal logic state (high or low logic
levels) or in a high-impedance state. The outputs also are in the high-impedance state during power-up and
power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In
the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE
does not affect the internal operation of the latches. Old data can be retained or new data can be entered
while the outputs are off.
The SN74ALS29841 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OE LE D
L H H H
L HL L
LLX Q
HXX Z
OUTPUT
Q
0
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
SN74ALS29841
10-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SDAS149A – JUNE 1988 – REVISED JANUAR Y 1995
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE
LE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
1
13
2
3
4
5
6
7
8
9
10
11
EN
C1
1D
logic diagram (positive logic)
1
OE
23
22
21
20
19
18
17
16
15
14
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
13
LE
1D
C1
2
1D
To Nine Other Channels
23
1Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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