Datasheet SN74ALS29827DW, SN74ALS29827DWR, SN74ALS29827NT, SN74ALS29828DW, SN74ALS29828DWR Datasheet (Texas Instruments)
...
DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
V
CC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
SN74ALS29827, SN74ALS29828
10-BIT BUFFERS AND BUS DRIVERS
WITH 3-STATE OUTPUTS
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• Functionally Equivalent to AMD’s AM29827
and AM29828
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• pnp Inputs Reduce dc Loading
• Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
• Power-Up High-Impedance State
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
description
These 10-bit buffers and bus drivers provide
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input NOR such that if either output-enable (OE1
or OE2) input is high, all
ten outputs are in the high-impedance state.
The SN74ALS29827 provides true data and the SN74ALS29828 provides inverted data at their respective
outputs.
The SN74ALS29827 and SN74ALS29828 are characterized for operation from 0°C to 70°C.
logic symbols
†
2
A1
3
A2
4
A3
5
A4
6
A5
Y1
23
Y2
22
Y3
21
Y4
20
Y5
19
Y6
18
Y7
17
Y8
16
7
A6
8
A7
9
A8
13
1
OE1
OE2
EN
&
Y9
15
Y10
14
10
A9
11
A10
13
2
A1
3
A2
4
A3
5
A4
6
A5
Y1
23
Y2
22
Y3
21
Y4
20
Y5
19
Y6
18
Y7
17
Y8
16
7
A6
8
A7
9
A8
EN
&
OE2
1
OE1
10
A9
11
A10
Y9
15
Y10
14
SN74ALS29827 SN74ALS29828
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74ALS29827, SN74ALS29828
10-BIT BUFFERS AND BUS DRIVERS
WITH 3-STATE OUTPUTS
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagrams (positive logic)
Y1
To Nine Other Channels
OE1
OE2
A1
223
13
1
To Nine Other Channels
OE2
OE1
A1
1
13
2
23
Y1
SN74ALS29827 SN74ALS29828
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74ALS29827
SN74ALS29828
UNIT
MIN NOM MAX
V
CC
Supply voltage 4.75 5 5.25 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
I
OH
High-level output current –24 mA
I
OL
Low-level output current 48 mA
T
A
Operating free-air temperature 0 70 °C
SN74ALS29827, SN74ALS29828
10-BIT BUFFERS AND BUS DRIVERS
WITH 3-STATE OUTPUTS
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
SN74ALS29827
SN74ALS29828
UNIT
MIN TYP†MAX
V
IK
VCC = 4.75 V , II = –18 mA –1.2 V
IOH = –15 mA 2.4
VOHV
CC
= 4.75
V
IOH = –24 mA 2
V
V
OL
VCC = 4.75 V , IOL = 48 mA 0.35 0.5 V
I
OZH
VCC = 5.25 V , VO = 2.4 V 20 µA
I
OZL
VCC = 5.25 V , VO = 0.4 V –20 µA
I
I
VCC = 5.25 V , VI = 5.5 V 0.1 mA
I
IH
VCC = 5.25 V , VI = 2.7 V 20 µA
I
IL
VCC = 5.25 V , VI = 0.4 V –0.1 mA
I
OS
‡
VCC = 5.25 V , VO = 0 –75 –250 mA
I
CC
VCC = 5.25 V 25 40 mA
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics (see Figure 1)
VCC = 4.75 V to 5.25 V
PARAMETER
FROM
TO
TEST CONDITIONS
SN74ALS29827 SN74ALS29828
UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX
t
PLH
15 14
t
PHL
A
Y
C
L
=
300 pF
15 14
ns
t
PLH
8 7
t
PHL
A
Y
C
L
= 50 p
F
8 7.5
ns
t
PZH
20 20
t
PZL
OE
Y
C
L
=
300 pF
23 23
ns
t
PZH
15 15
t
PZL
OE
Y
C
L
= 50 p
F
15 15
ns
t
PHZ
17 17
t
PLZ
OE
Y
C
L
= 50 p
F
12 12
ns
t
PHZ
p
9 9
t
PLZ
OE
Y
C
L
=
5 pF
9 9
ns
SN74ALS29827, SN74ALS29828
10-BIT BUFFERS AND BUS DRIVERS
WITH 3-STATE OUTPUTS
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
R1
1 kΩ
All Diodes
1N916 or 1N3064
From Output
Under Test
Test Point
S2
C
L
(see Note A)
RL = 180 Ω
1.5 V
1.5 V
1.5 V
3 V
3 V
0
0
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing Input
Data Input
1.5 V
1.5 V
3 V
3 V
0
0
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V
1.5 V
t
PHL
t
PLH
t
PLH
t
PHL
Out-of-Phase
Output
1.5 V 1.5 V
1.5 V1.5 V
1.5 V 1.5 V
3 V
0
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
t
PHZ
t
PLZ
0.5 V
t
PZL
t
PZH
1.5 V1.5 V
1.5 V
1.5 V
3 V
0
Output
Control
Waveform 1
(see Note B)
Waveform 2
(see Note B)
≈ 0
V
OH
V
OL
≈ 1.5 V
0.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
V
CC
S1
SWITCH POSITION TABLE
TEST S1 S2
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Closed
Closed
Open
Closed
Closed
Closed
Closed
Closed
Closed
Open
Closed
Closed
≈ 4.5 V
≈ 1.5 V
Input
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr≤ 2.5 ns, tf≤ 2.5 ns.
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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In order to minimize risks associated with the customer’s applications, adequate design and operating
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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