TEXAS INSTRUMENTS SN54ALS273, SN74ALS273 Technical data

SN54ALS273, SN74ALS273
OUTPUT
OCTAL D-TYPE FLIP-FLOPS
WITH CLEAR
SDAS218A – APRIL 1982 – REVISED DECEMBER 1994
Contain Eight Flip-Flops With Single-Rail
Buffered Clock and Direct-Clear Inputs
Individual Data Input to Each Flip-Flop
Applications Include:
Buffer/Storage Registers Shift Registers Pattern Generators
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
description
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear (CLR
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
) input.
SN54ALS273 ...J PACKAGE
SN74ALS273 . . . DW OR N PACKAGE
SN54ALS273 . . . FK PACKAGE
2D 2Q 3Q 3D 4D
(TOP VIEW)
1
CLR
2
1Q
3
1D
4
2D
5
2Q
6
3Q
7
3D
8
4D
9
4Q
GND
10
(TOP VIEW)
1D1QCLR
3212019
4 5 6 7 8
910111213
20 19 18 17 16 15 14 13 12 11
V
CC
V 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK
8Q
18 17 16 15 14
CC
8D 7D 7Q 6Q 6D
The SN54ALS273 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLK D
CLR
L X X L H HH H↑LL HH or L X Q
OUTPUT
Q
0
4Q
CLK
GND
5Q
5D
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1994, Texas Instruments Incorporated
1
SN54ALS273, SN74ALS273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR
SDAS218A – APRIL 1982 – REVISED DECEMBER 1994
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
CLR
CLK
1D 2D 3D 4D 5D 6D 7D 8D
1 11
3 4 7 8 13 14 17 18
R
C1
1D
logic diagram (positive logic)
CLK
1D
11
3
1D
C1
R
2D
4
1D
C1
R
3D
4D
7
1D
C1
R
8
1D
R
5D
13
C1
1D
R
C1
12 15 16 19
2 5 6 9
6D
14
1D
R
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
C1
7D
17
1D
R
C1
8D
18
1D
C1
R
1
CLR
2
1Q
2Q
5
3Q
6
4Q
9
5Q
12
6Q
15
7Q
16
8Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V Input voltage, V Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS273 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS273 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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