Texas Instruments SN74ALS156D, SN74ALS156DR, SN74ALS156N Datasheet

SN74ALS156

DECODER/DEMULTIPLEXER

WITH OPEN-COLLECTOR OUTPUTS

SDAS099C – JUNE 1986 – REVISED MA Y 1996

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Applications:
– Dual 2-Line to 4-Line Decoder
– Dual 1-Line to 4-Line Demultiplexer
– 3-Line to 8-Line Decoder
– 1-Line to 8-Line Demultiplexer

D

Individual Strobes Simplify Cascading for
Decoding or Demultiplexing Larger Words

D

Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic (N) 300-mil DIPs

description

One of the main applications of the SN74ALS156 is as a dual 1-line to 4-line decoder /demultiplexer with
individual strobes (G

) and common binary-address inputs in a single 16-pin package. When both sections are
enabled, the common binary-address inputs sequentially select and route associated input data to the
appropriate output of each section. The individual strobes permit enabling or disabling each of the 4-bit sections,
as desired.

Data applied to input 1C is inverted at its outputs and data applied at input 2C

is not inverted through its outputs.
The inverter following the 1C data input permits use of the SN74ALS156 as a 3-line to 8-line demultiplexer
without external gating. All inputs are clamped with high-performance Schottky diodes to suppress line ringing
and simplify system design.

The SN74ALS156 is characterized for operation from 0°C to 70°C.

Copyright  1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D OR N PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

1C
1G

B
1Y3
1Y2
1Y1
1Y0

GND

V

CC

2C
2G
A
2Y3
2Y2
2Y1
2Y0

SN74ALS156
DECODER/DEMULTIPLEXER
WITH OPEN-COLLECTOR OUTPUTS

SDAS099C – JUNE 1986 – REVISED MA Y 1996

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function Tables

2-LINE TO 4-LINE DECODER OR

1-LINE TO 4-LINE DEMUL TIPLEXER

INPUTS

SELECT

STROBE DATA

OUTPUTS

B A

1G 1C

1Y0 1Y1 1Y2 1Y3

X X H X H H H H
L LL HLHHH
LHL HHLHH
HLL HHHLH
HHL HHHHL
XX X L HHHH

2-LINE TO 4-LINE DECODER OR

1-LINE TO 4-LINE DEMUL TIPLEXER

INPUTS

SELECT

STROBE DATA

OUTPUTS

B A

2G 2C

2Y0 2Y1 2Y2 2Y3

X X H X H H H H
L LL LLHHH
LHL LHLHH
HLL LHHLH
HHL LHHHL
XX X H HHHH

3-LINE TO 8-LINE DECODER OR

1-LINE TO 8-LINE DEMUL TIPLEXER

INPUTS

OUTPUTS

SELECT

STROBE

OR

0 1 2 3 4 5 6 7

C

†

B A

DATA

G

‡

2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3

X X X H H H H H H H H H
L LL L LHHHLHHH
LLH L HLHHHLHH
LHL L HHLHHHHH
LHH L HHHLHHHH
HLL L HHHHLHHH
HLH L HHHHHLHH
HHL L HHLHHHLH
HHH L HHHLHHHL

†

C = inputs 1C and 2C connected together

‡

G

= inputs 1G and 2G connected together

SN74ALS156

DECODER/DEMULTIPLEXER

WITH OPEN-COLLECTOR OUTPUTS

SDAS099C – JUNE 1986 – REVISED MA Y 1996

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbols† (alternatives)

X/Y

2-LINE TO 4-LINE DECODER

1

1C

4

1Y0

7

1Y1

6

1Y2

5

1Y3

4

0
1

2
3

2Y0

9

2Y1

10

2Y2

11

2Y3

12

0
1

2
3

α
α

α
α
β
β

β
β

2

1

13

A

2

3

B

14
15

&

&

EN

EN

1G

2G
2C

1-LINE TO 4-LINE DEMUL TIPLEXER

0

13

A

1

3

B

G

0
3

DMUX

4

1

1C

G4

2

1G

14
15

2G
2C

1Y0

7

1Y1

6

1Y2

5

1Y3

4

2Y0

9

2Y1

10

2Y2

11

2Y3

12

0
1

2
3

X/Y

3-LINE TO 8-LINE DECODER

C

2Y0

9

2Y1

10

2Y2

11

2Y3

12

0
1

2
3

1Y0

7

1Y1

6

1Y2

5

1Y3

4

4
5

6
7

1

13

A

2

3

B

G

1
15

2
14

EN

2

DMUX

1-LINE TO 8-LINE DEMUL TIPLEXER

C

2Y0

9

2Y1

10

2Y2

11

2Y3

12

0
1

2
3

1Y0

7

1Y1

6

1Y2

5

1Y3

4

4
5

6
7

13

A

3

B

G

1
15

2
14

G

0
7

0

†

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.