Datasheet SN74ALB16245DGGR, SN74ALB16245DGVR, SN74ALB16245DL, SN74ALB16245DLR Datasheet (Texas Instruments)
OPERATION
SN74ALB16245
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
D
Member of the Texas Instruments
Widebus
D
State-of-the-Art Advanced Low-Voltage
Family
BiCMOS (ALB) Technology Design for 3.3-V
Operation
D
Schottky Diodes on All Inputs to Eliminate
Overshoot and Undershoot
D
Industry Standard ’16245 Pinout
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
Flow-Through Architecture Optimizes PCB
Layout
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
The SN74ALB16245 is a 16-bit transceiver
designed for high-speed, low-voltage (3.3-V) V
operation. This device is intended to replace the
conventional transceiver in any speed-critical
path. The small propagation delay is achieved
using a unity gain amplifier on the input and
feedback resistors from input to output, which
allows the output to track the input with a small
offset voltage.
CC
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE
) input can be used to disable the device so that the buses are effectively isolated.
The SN74ALB16245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN74ALB16245
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
logic symbol
†
1OE
1DIR
2OE
2DIR
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
48
1
25
24
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
G3
3 EN1 [BA]
3 EN2 [AB]
G6
6 EN4 [BA]
6 EN5 [AB]
1
4
2
1B1
2
5
11
12
13
14
16
17
19
20
22
23
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
1DIR
1A1
47
To Seven Other Channels
48
1OE
2
1B1
2DIR
2A1
24
36
To Seven Other Channels
25
13
2OE
2B1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VIKA or B ports
V
V
V
V
V
A or B ports
V
V
V
0
SN74ALB16245
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Except I/O ports (see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through each V
Package thermal impedance, θ
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(V
= 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
O
or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 3): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions
MIN MAX UNIT
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate Outputs enabled 5 ns/V
T
‡
Refer to Figures 1 and 2 for typical I/O ranges.
Supply voltage 3 3.6 V
CC
‡
High-level output current –25 mA
‡
Low-level output current 25 mA
Operating free-air temperature –40 85 °C
A
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
p
Control inputs VCC = 3.6 V, VI = VCC or GND ±10 µA
I
I
I
OZH
I
OZL
ICC/buffer VCC = 3.6 V, IO = 0, VI = VCC or GND 3.7 5.6 mA
I
CCZ
¶
∆I
CC
C
i
C
io
§
All typical values are at VCC = 3.3 V, TA = 25°C.
¶
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
p
= 3
CC
= 3.6
CC
VCC = 3.6 V, VO = 3 V 0.7 20 µA
VCC = 3.6 V, VO = 0.5 V –0.2 –50 µA
VCC = 3.6 V, Control inputs = VCC or GND 0.8 mA
VCC = 3 V to 3.6 V, One input at VCC –0.6 V,
Other inputs at VCC or GND
VI = 3 V or 0 3.5 pF
VO = 3 V or 0 7.5 pF
II = 18 mA 3.7 VCC+1.2
II = –18 mA –0.9 –1.2
=
I
CC
=
I
OE low 0.4 0.6 mA
OE high 25 µA
OE low –0.7 –1 mA
OE high –60 µA
§
MAX UNIT
600 µA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN74ALB16245
PARAMETER
UNIT
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 3)
VCC = 3.3 V ± 0.3 V
MIN TYP†MAX
t
pd
t
en
t
dis
†
All typical values are at VCC = 3.3 V, TA = 25°C.
FROM TO
(INPUT) (OUTPUT)
A or B
OE
OE
B or A 0.6 1.3 2 ns
A or B 1.5 3.2 6 ns
A or B 1.8 2.8 4.2 ns
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALB16245
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
OUTPUT VOLTAGE HIGH
vs
3.5
3
2.5
–100 µA
– Output Voltage – V
OH
V
2
1.5
1.5 2 2.5 3 3.5 4
INPUT VOLTAGE
–25 mA
–6 mA
VI – Input Voltage – V
Figure 1. VOH Over Recommended Free-Air Temperature Range
OUTPUT VOLTAGE LOW
vs
2
1.5
1
– Output Voltage – V
OL
V
0.5
0
0 0.5 1 1.5 2
INPUT VOLTAGE
25 mA
100 µA
6 mA
VI – Input Voltage – V
Figure 2. VOL Over Recommended Free-Air Temperature Range
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN74ALB16245
3.3-V ALB 16-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS678B – SEPTEMBER 1996 – REVISED JUL Y 1997
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
500 Ω
S1
6 V
Open
GND
TEST S1
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
Open
6 V
GND
LOAD CIRCUIT
Timing
Input
t
Data
Input
Input
Output
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, trv
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
F. t
PZL
G. t
PLH
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V 1.5 V
VOLTAGE WAVEFORMS
and t
PHZ
and t
PZH
and t
PHL
1.5 V
t
t
PLH
h
.
dis
su
1.5 V 1.5 V
are the same as t
are the same as ten.
are the same as tpd.
t
PHL
3 V
0 V
3 V
0 V
Output Control
(low-level enabling)
3 V
0 V
V
OH
V
OL
Input
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t
w
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V 1.5 V
t
PZL
1.5 V
t
PZH
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
3 V
0 V
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
2.5 ns, tfv
3 V
0 V
3 V
V
OL
V
OH
0 V
2.5 ns.
Figure 3. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Loading...