Texas Instruments SN74AHCT139DR, SN74AHCT139N, SN74AHCT139PWLE, SN74AHCT139PWR, SN74AHCT139DBLE Datasheet
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SN54AHCT139, SN74AHCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267K – DECEMBER 1995 – REVISED JANUARY 2000
D
EPIC
(Enhanced-Performance Implanted
CMOS) Process
D
Inputs Are TTL-Voltage Compatible
D
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
ESD Protection Exceeds 2000 V Per
SN54AHCT139 ...J OR W PACKAGE
SN74AHCT139 . . . D, DB, DGV, N, OR PW PACKAGE
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
9
2Y3
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Standard Plastic (N) and Ceramic
(J) DIPs
description
SN54AHCT139 . . . FK PACKAGE
1B
1Y0
NC
1Y1
1Y2
(TOP VIEW)
1A1GNC
3212019
4
5
6
7
8
910111213
V
CC
2G
18
17
16
15
14
2A
2B
NC
2Y0
2Y1
The ’AHCT139 devices are dual 2-line to 4-line
decoders/demultiplexers designed for 4.5-V to
5.5-V V
operation. These devices are
CC
designed to be used in high-performance
NC – No internal connection
1Y3
NC
GND
2Y3
2Y2
memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders can be
used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable
circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical
access time of the memory . This means that the effective system delay introduced by the decoders is negligible.
The active-low enable (G) input can be used as a data line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its
driving circuit.
The SN54AHCT139 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74AHCT139 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1
SN54AHCT139, SN74AHCT139
OUTPUTS
G
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267K – DECEMBER 1995 – REVISED JANUARY 2000
FUNCTION TABLE
(each decoder/demultiplexer)
INPUTS
SELECT
B A Y0 Y1 Y2 Y3
H X X H H H H
L L LLHHH
L L HHLHH
L H LHHLH
L H H H H H L
X/Y
†
4
12
11
10
1Y0
5
1Y1
6
1Y2
7
1Y3
2Y0
2Y1
2Y2
9
2Y3
0
1
2
3
1A
1B
1G
2A
2B
2G
2
3
1
14
13
15
logic symbols (alternatives)
2
1A
3
1B
1
1G
14
2A
13
2B
15
2G
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
1
2
EN
EN
1
2
EN
EN
DMUX
G
4
12
11
10
1Y0
5
1Y1
6
1Y2
7
1Y3
2Y0
2Y1
2Y2
9
2Y3
0
0
1
3
2
3
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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