Texas Instruments SN74AHC540DBR, SN74AHC540DGVR, SN74AHC540DW, SN74AHC540DWR, SN74AHC540N Datasheet
...
SN54AHC540, SN74AHC540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
D
EPIC
(Enhanced-Performance Implanted
CMOS) Process
D
Operating Range 2-V to 5.5-V V
D
Latch-Up Performance Exceeds 250 mA Per
CC
JESD 17
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Standard Plastic (N) and Ceramic
(J) DIPs
description
The ’AHC540 octal buffers/drivers are ideal for
driving bus lines or buffer memory address
registers. These devices feature inputs and
outputs on opposite sides of the package to
facilitate printed circuit board layout.
The 3-state control gate is a two-input AND gate
with active-low inputs so that if either
output-enable (OE1
corresponding outputs are in the high-impedance
state. The outputs provide inverted data when
they are not in the high-impedance state.
T o ensure the high-impedance state during power
up or power down, OE
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
or OE2) input is high, all
should be tied to V
CC
SN74AHC540 . . . DB, DGV, DW, N, OR PW PACKAGE
SN54AHC540 ...J OR W PACKAGE
(TOP VIEW)
Y8
20
19
18
17
16
15
14
13
12
11
V
CC
Y7
V
CC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
Y6 OE2
Y1
Y2
Y3
Y4
Y5
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
9
A8
GND
SN54AHC540 . . . FK PACKAGE
10
(TOP VIEW)
A2A1OE1
A3
A4
A5
A6
A7
3212019
4
5
6
7
8
910111213
A8
GND
The SN54AHC540 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74AHC540 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
INPUTS
OE1 OE2 A
L L L H
L LH L
H XX Z
X H X Z
OUTPUT
Y
Copyright 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
SN54AHC540, SN74AHC540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
1
19
2
3
4
5
6
7
8
9
&
EN
1
logic diagram (positive logic)
OE1
OE2
1
19
218
A1
18
17
16
15
14
13
12
11
Y1
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
Continuous current through VCC or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
mA
mA
∆t/∆vInput transition rise or fall rate
ns/V
PARAMETER
TEST CONDITIONS
V
UNIT
OH
OL
SN54AHC540, SN74AHC540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
recommended operating conditions (see Note 3)
SN54AHC540 SN74AHC540
MIN MAX MIN MAX
V
V
V
V
V
I
OH
I
OL
T
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 2 5.5 2 5.5 V
CC
VCC = 2 V 1.5 1.5
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
High-level output current
Low-level output current
p
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
VCC = 3 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VCC = 3 V
VCC = 5.5 V 1.65 1.65
VCC = 2 V –50 –50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V –8 –8
VCC = 2 V 50 50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 8 8
VCC = 3.3 V ± 0.3 V 100 100
VCC = 5 V ± 0.5 V 20 20
2.1 2.1
0.9 0.9
CC
–4 –4
4 4
0 V
CC
V
V
V
m
A
m
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
2 V 1.9 2 1.9 1.9
IOH = –50 mA
V
OH
IOH = –4 mA
IOH = –8 mA
IOL = 50 mA
V
OL
IOL = 4 mA
IOL = 8 mA
I
I
†
I
OZ
I
CC
C
i
C
o
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
†
For I/O pins, the parameter IOZ includes the input leakage current.
VI = VCC or GND 0 V to 5.5 V ±0.1 ±1* ±1
VO = VCC or GND,
VI (OE
) = VIL or V
VI = VCC or GND, IO = 0 5.5 V 4 40 40
VI = VCC or GND 5 V 2 10 10 pF
VO = VCC or GND 5 V 4 pF
IH
3 V 2.9 3 2.9 2.9
4.5 V 4.4 4.5 4.4 4.4
3 V 2.58 2.48 2.48
4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
3 V 0.1 0.1 0.1
4.5 V 0.1 0.1 0.1
3 V 0.36 0.5 0.44
4.5 V 0.36 0.5 0.44
5.5 V ±0.25 ±2.5 ±2.5
TA = 25°C SN54AHC540 SN74AHC540
MIN TYP MAX MIN MAX MIN MAX
V
V
m
A
m
A
m
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54AHC540, SN74AHC540
PARAMETER
UNIT
AYC
15 pF
ns
OE
Y
C
15 pF
ns
OE
Y
C
pF
ns
AYC
50 pF
ns
OE
Y
C
50 pF
ns
OE
Y
C
pF
ns
PARAMETER
UNIT
AYC
15 pF
ns
OE
Y
C
pF
ns
OE
Y
C
pF
ns
AYC
pF
ns
OE
Y
C
pF
ns
OE
Y
C
pF
ns
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(o)
∗
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗
On products compliant to MIL-PRF-38535, this parameter does not apply.
CL = 50 pF 1.5** 1.5 ns
=
L
=
L
= 15
L
=
L
=
L
= 50
L
p
p
p
p
p
p
TA = 25°C SN54AHC540 SN74AHC540
MIN TYP MAX MIN MAX MIN MAX
4.8* 7* 1* 8.5* 1 8.5
4.8* 7* 1* 8.5* 1 8.5
6.8* 10.5* 1* 12.5* 1 12.5
6.8* 10.5* 1* 12.5* 1 12.5
6.8* 10.5* 1* 12.5* 1 12.5
6.8* 10.5* 1* 12.5* 1 12.5
7.3 10.5 1 12 1 12
7.3 10.5 1 12 1 12
8 14 1 16 1 16
8 14 1 16 1 16
8 15.4 1 17.5 1 17.5
8 15.4 1 17.5 1 17.5
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(o)
∗
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗
On products compliant to MIL-PRF-38535, this parameter does not apply.
CL = 50 pF 1** 1 ns
=
L
= 15
L
= 15
L
= 50
L
= 50
L
= 50
L
p
p
p
p
p
p
TA = 25°C SN54AHC540 SN74AHC540
MIN TYP MAX MIN MAX MIN MAX
3.7* 5* 1* 6* 1 6
3.7* 5* 1* 6* 1 6
4.7* 7.2* 1* 8.5* 1 8.5
4.7* 7.2* 1* 8.5* 1 8.5
4.5* 6.8* 1* 8* 1 8
4.5* 6.8* 1* 8* 1 8
5.2 7 1 8 1 8
5.2 7 1 8 1 8
6.2 9.2 1 10.5 1 10.5
6.2 9.2 1 10.5 1 10.5
6 8.8 1 10 1 10
6 8.8 1 10 1 10
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
UNIT
SN54AHC540, SN74AHC540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
noise characteristics, V
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
NOTE 4: Characteristics are for surface-mount packages only.
Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage 3.5 V
Low-level dynamic input voltage 1.5 V
operating characteristics, V
C
Power dissipation capacitance No load, f = 1 MHz 12 pF
pd
= 5 V, CL = 50 pF, TA = 25°C (see Note 4)
CC
OL
OL
OH
= 5 V, TA = 25°C
CC
PARAMETER TEST CONDITIONS TYP UNIT
SN74AHC540
MIN MAX
0.8 V
–0.8 V
4.7 V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54AHC540, SN74AHC540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS260H – DECEMBER 1995 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
(see Note A)
Test
Point
C
L
From Output
Under Test
(see Note A)
V
RL = 1 kΩ
C
L
S1
CC
Open
GND
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open Drain
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Input
Input
t
PLH
In-Phase
Output
t
PHL
Out-of-Phase
Output
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
t
w
50% V
CC
VOLTAGE WAVEFORMS
PULSE DURATION
50% V
CC
50% V
50% V
VOLTAGE WAVEFORMS
50% V
CC
CC
3-STATE AND OPEN-DRAIN OUTPUTS
50% V
LOAD CIRCUIT FOR
V
CC
CC
0 V
V
CC
CC
t
PHL
50% V
t
PLH
50% V
CC
CC
0 V
V
V
V
V
OH
OL
OH
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
50% V
CC
t
su
50% V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
50% V
CC
t
PZL
50% V
50% V
CC
CC
CC
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
t
h
50% V
50% V
CC
CC
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
V
CC
0 V
V
CC
0 V
V
CC
0 V
≈V
V
OL
V
OH
≈0 V
CC
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
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Copyright 2000, Texas Instruments Incorporated
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