Texas Instruments SN74ACT240DWR, SN74ACT240N, SN74ACT240PWLE, SN74ACT240PWR, SN74ACT240DBLE Datasheet
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SN54ACT240, SN74ACT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS515B – JUNE 1995 – REVISED MA Y 1996
D
Inputs Are TTL Compatible
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Plastic (N) and Ceramic (J) DIPs
description
These octal buffers and line drivers are designed
specifically to improve the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
The ’ACT240 are organized as two 4-bit
buffers/drivers with separate output-enable (OE
inputs. When OE is low, the device passes
inverted data from the A inputs to the Y outputs.
When OE
high-impedance state.
The SN54ACT240 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ACT240 is characterized for
operation from –40°C to 85°C.
is high, the outputs are in the
SN54ACT240 ...J OR W PACKAGE
SN74ACT240 . . . DB, DW, N, OR PW PACKAGE
SN54ACT240 . . . FK PACKAGE
)
1A2
2Y3
1A3
2Y2
1A4
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
3 2 1 20 19
4
5
6
7
8
(TOP VIEW)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
(TOP VIEW)
CC
1A1
V
1OE
2Y4
9 10 11 12 13
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1Y4
2A1
2A2 2OE
2Y1
FUNCTION TABLE
(each buffer)
INPUTS
OE A
L H L
L LH
H X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUT
Y
GND
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1996, Texas Instruments Incorporated
1
SN54ACT240, SN74ACT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS515B – JUNE 1995 – REVISED MA Y 1996
logic symbol
1OE
1A1
1A2
1A3
1A4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
1
2
4
6
8
EN
18
16
14
12
1Y1
1Y2
1Y3
1Y4
2OE
2A1
2A2
2A3
2A4
logic diagram (positive logic)
1
1OE
1A1
1A2
1A3
2
4
6
18
16
14
1Y1
1Y2
1Y3
2OE
2A1
2A2
2A3
19
11
13
15
17
19
11
13
15
EN
9
2Y1
7
2Y2
5
2Y3
3
2Y4
9
2Y1
7
2Y2
5
2Y3
1A4
8
12
1Y4
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package 0.6 W. . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
DW package 1.6 W. . . . . . . . . . . . . . . . . .
N package 1.3 W. . . . . . . . . . . . . . . . . . . .
PW package 0.7 W. . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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