Texas Instruments SN74ACT2235-20FN, SN74ACT2235-20PAG, SN74ACT2235-20PM, SN74ACT2235-30FN, SN74ACT2235-30FNR Datasheet
...
SN74ACT2235
1024 × 9 × 2
ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS148E – DECEMBER 1990 – REVISED APRIL 1998
D
Independent Asynchronous Inputs and
Outputs
D
Low-Power Advanced CMOS Technology
D
Bidirectional
D
Dual 1024 by 9 Bits
D
Programmable Almost-Full/Almost-Empty
Flag
D
Empty, Full, and Half-Full Flags
description
A FIFO memory is a storage device that allows data to be written into and read from its array at independent
data rates. The SN74ACT2235 is arranged as two 1024 by 9-bit FIFOs for high speed and fast access times.
It processes data at rates up to 50 MHz, with access times of 25 ns in a bit-parallel format.
The SN74ACT2235 consists of bus-transceiver circuits, two 1024 × 9 FIFOs, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable (GAB
and GBA) inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are
provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates
the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.
Figure 2 shows the eight fundamental bus-management functions that can be performed with the
SN74ACT2235.
D
Access Times of 25 ns With a 50-pF Load
D
Data Rates up to 50 MHz
D
Fall-Through Times of 22 ns Maximum
D
High Output Drive for Direct Bus Interface
D
Package Options Include 44-Pin Plastic
Leaded Chip Carriers (FN) and 64-Pin Thin
Quad Flat (PAG, PM) Packages
For more information on this device family, see the application report,
SN74ACT2235
, literature number SCAA010.
The SN74ACT2235 is characterized for operation from 0°C to 70°C.
FN PACKAGE
(TOP VIEW)
GAB
SAB
DBF
GNDB0B1
42 41 4043
UNCKA
EMPTY A
B2
39
B3
38
B4
37
V
36
CC
B5
35
B6
34
B7
33
B8
32
GND
31
AF/AEB
30
HFB
29
FULLB
LDCKB
A3
A4
V
CC
A5
A6
A7
A8
GND
AF/AEA
HFA
LDCKA
A2A1A0
7
8
9
10
11
12
13
14
15
16
17
1819
FULLA
GND
GBA
SBA
54321644
20 21 22 23
UNCKB
EMPTYB
DAF
RSTA
24 25 26 27 28
RSTB
1K × 9 × 2 Asynchronous FIFO
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
SN74ACT2235
1024 × 9 × 2
ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS148E – DECEMBER 1990 – REVISED APRIL 1998
PAG OR PM PACKAGE
(TOP VIEW)
V
CC
A3
A4
V
CC
GND
GND
A5
A6
V
CC
V
CC
A7
A8
GND
GND
AF/AEA
HFA
CC
V
A1
A0
GND
A2
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 25 26 27 28 29 30 31 322423
NC
FULLA
LDCKA
UNCKB
GBA
GND
DAF
RSTA
EMPTYB
SBA
NC
SAB
GAB
RSTB
GND
DBF
EMPTYA
GNDB1B2
B0
NC
UNCKA
FULLB
LDCKB
V
CC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
NC
NC
V
CC
B3
B4
GND
GND
V
CC
B5
B6
V
CC
B7
B8
GND
GND
AF/AEB
HFB
NC – No internal connection
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ACT2235
1024 × 9 × 2
ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS148E – DECEMBER 1990 – REVISED APRIL 1998
logic symbol
†
Φ
44
SAB
1
SBA
43
GAB
2
GBA
RSTA
LDCKA
UNCKA
FULLA
EMPTYA
AF/AEA
22
21
DAF
17
26
18
25
15
16
HFA HFB
4
A0
5
A1
6
A2
7
A3
8
A4
10
A5
11
A6
12
A7
13
A8
1
MODE
0
EN1
EN2
Reset A
DEF A FLAG
LDCKA
UNCKA
FULLA
EMPTY A
ALMOST-FULL/
ALMOST-EMPTY A
HALF-FULL A
0
A Data
8
FIFO
1024 × 9 × 2
SN74ACT2235
RESET B
DEF B FLAG
LDCKB
UNCKB
FULL B
EMPTYB
ALMOST-FULL/
ALMOST-EMPTY A
HALF-FULL B
0
B Data
8
23
24
28
19
27
20
30
29
41
40
39
38
37
35
34
33
32
RSTB
DBF
LDCKB
UNCKB
FULLB
EMPTYB
AF/AEB
B0
B1
B2
B3
B4
B5
B6
B7
B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the FN package.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN74ACT2235
1024 × 9 × 2
ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS148E – DECEMBER 1990 – REVISED APRIL 1998
logic diagram (positive logic)
SAB
SBA
Φ
HFB
AF/AEB
EMPTYB
UNCKB
FIFO B
1024 × 9
RSTB
DBF
FULLB
LDCKB
GBA
GAB
RSTA
DAF
FULLA
LDCKA
A0
One of Nine Channels
To Other Channels
Φ
FIFO A
1024 × 9
D
Q
Q
One of Nine Channels
D
B0
HFA
AF/AEA
EMPTYA
UNCKA
To Other Channels
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Loading...