Texas Instruments SN74ABT863DBLE, SN74ABT863DBR, SN74ABT863DW, SN74ABT863DWR, SN74ABT863NT Datasheet
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
T ypical V
at V
D
High-Impedance State During Power Up
= 5 V, TA = 25°C
CC
(Output Ground Bounce) < 1 V
OLP
and Power Down
D
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB) Packages, and Thin Shrink
Small-Outline (PW), Ceramic Chip Carriers
(FK), Plastic (NT), and Ceramic (JT) DIPs
description
The ’ABT863 devices are 9-bit transceivers
designed for asynchronous communication
between data buses. The control-function
implementation allows for maximum flexibility in
timing.
These devices allow noninverted data
transmission from the A bus to the B bus or from
the B bus to the A bus, depending on the logic
levels at the output-enable (OEAB
inputs.
and OEBA)
SN74ABT863 . . . DB, DW, NT, OR PW PACKAGE
SN54ABT863 . . . JT PACKAGE
(TOP VIEW)
OEBA1
OEBA2
SN54ABT863 . . . FK PACKAGE
A3
A4
A5
NC
A6
A7
A8
1
24
A1
2
23
A2
3
22
A3
4
21
A4
5
20
A5
6
19
A6
7
18
A7
8
17
A8
9
16
10
A9
GND
(TOP VIEW)
A2A1OEBA1NCB1
426
3212827
5
6
7
8
9
10
11
12 13
15
11
14
12
13
CC
V
14 15 16 17 18
V
CC
B1
B2
B3
B4
B5
B6
B7
B8
B9
OEAB2
OEAB1
B2
25
24
21
22
21
20
19
B3
B4
B5
NC
B6
B7
B8
The outputs are in the high-impedance state
during power up and power down. The outputs
remain in the high-impedance state while the
device is powered down.
When V
is between 0 and 2.1 V, the device is
CC
NC – No internal connection
A9
GND
OEBA2
NC
OEAB1
OEAB2
B9
in the high-impedance state during power up or
power down. However, to ensure the
high-impedance state above 2.1 V , OE
tied to V
through a pullup resistor; the minimum
CC
should be
value of the resistor is determined by the
current-sinking capability of the driver.
The SN54ABT863 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT863 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABT863, SN74ABT863
OPERATION
A
to
B
B
to
A
Isolation
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
OEAB1 OEAB2 OEBA1 OEBA2
L L L L Latch A and B
L L H X
L LXH
HXLL
XHLL
HXHX
HXXH
XHXH
XHHX
FUNCTION TABLE
INPUTS
logic symbol
†
OEBA1
OEBA2
OEAB1
OEAB2
A1
A2
A3
A4
A5
A6
1
11
13
14
2
3
4
5
6
7
&
&
121
1
EN1
EN2
23
22
21
20
19
18
B1
B2
B3
B4
B5
B6
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
OEBA1
OEBA2
OEAB1
OEAB2
Pin numbers shown are for the DB, DW, JT, NT, and PW packages.
1
11
13
14
223
A1 B1
To Eight Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Voltage range applied to any output in the high or power-off state, V
Current into any output in the low state, I
Input clamp current, I
Output clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ABT863 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
–0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
O
SN74ABT863 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
(see Note 2): DB package 104°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NT package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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