Datasheet SN74ABT620DWR, SN74ABT620N, SN74ABT620DBLE, SN74ABT620DBR, SN74ABT620DW Datasheet (Texas Instruments)
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
T ypical V
at V
D
High-Drive Outputs (–32-mA IOH,
= 5 V, TA = 25°C
CC
64-mA I
D
Package Options Include Plastic
(Output Ground Bounce) < 1 V
OLP
)
OL
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (N) and Ceramic (J) DIPs
description
These octal bus transceivers provide for
asynchronous communication between data
buses. The control-function implementation
allows for maximum flexibility in timing. The
’ABT620 devices provide inverted data at the
outputs.
These devices allow data transmission from the
A bus to the B bus or from the B bus to the A bus,
depending on the logic levels at the output-enable
(OEAB and OEBA
) inputs.
SN74ABT620 . . . DB, DW, N, OR PW PACKAGE
SN54ABT620 ...J PACKAGE
(TOP VIEW)
OEAB
GND
SN54ABT620 . . . FK PACKAGE
A3
A4
A5
A6
A7
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
9
A8
10
(TOP VIEW)
A2A1OEAB
3212019
4
5
6
7
8
910111213
A8
GND
B8
20
19
18
17
16
15
14
13
12
11
V
CC
B7
V
CC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
B6 OEBA
B1
B2
B3
B4
B5
The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The
dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB
and OEBA
. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines
are at high impedance, both sets of bus lines (16 total) remain at their last states. In this way, each output
reinforces its input in this configuration.
To ensure the high-impedance state during power up or power down, OEBA
should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sourcing capability of the driver.
The SN54ABT620 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT620 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABT620, SN74ABT620
OPERATION
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
FUNCTION TABLE
INPUTS
OEBA OEAB
L L B data to A bus
L H
H L Isolation
H H A data to B bus
B data to A bus,
A
data to B bus
19
1
2
3
4
5
6
7
8
9
†
EN1
EN2
1
1
12
18
17
16
15
14
13
12
11
logic symbol
OEBA
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
OEBA
OEAB
B1
B2
B3
B4
B5
B6
B7
B8
19
1
218
A1
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Voltage range applied to any output in the high or power-off state, V
Current into any output in the low state, I
Input clamp current, I
Output clamp current, I
Package thermal impedance, θ
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ABT620 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
–0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
O
SN74ABT620 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
(see Note 2): DB package 115°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
recommended operating conditions (see Note 3)
SN54ABT620 SN74ABT620
MIN MAX MIN MAX
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate Outputs enabled 5 5 ns/V
T
NOTE 3: All unused pins (control or I/O) of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application
Supply voltage 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 V
I
High-level output current –24 –32 mA
Low-level output current 48 64 mA
Operating free-air temperature –55 125 –40 85 °C
A
report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
CC
0 V
CC
V
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ABT620, SN74ABT620
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
4.5 V
VOLV
V
V
I
V
V
V
GND
A
V
CC
¶
D
,
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54ABT620 SN74ABT620
MIN TYP†MAX MIN MAX MIN MAX
V
IK
OH
V
hys
I
I
OZH
I
OZL
I
off
I
CEX
I
O
I
CC
∆I
C
C
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
All typical values are at VCC = 5 V.
‡
The parameters I
§
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Control inputs
A or B ports
‡
‡
§
A or B ports
ata inputs
CC
Control inputs
Control inputs VI = 2.5 V or 0.5 V 4 pF
i
A or B ports VO = 2.5 V or 0.5 V 7 pF
io
OZH
VCC = 4.5 V, II = –18 mA –1.2 –1.2 –1.2 V
VCC = 4.5 V, IOH = –3 mA 2.5 2.5 2.5
VCC = 5 V, IOH = –3 mA 3 3 3
=
CC
= 4.5
CC
= 5.5 V,
CC
VCC = 5.5 V, VO = 2.7 V 50 50 50 µA
VCC = 5.5 V, VO = 0.5 V –50 –50 –50 µA
VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
VCC = 5.5 V,
VO = 5.5 V
VCC = 5.5 V, VO = 2.5 V –50 –100 –180 –50 –180 –50 –180 mA
=
= 5.5 V,
IO = 0,
VI = VCC or GND
VCC = 5.5 V,
One input at 3.4 V ,
Other inputs at
VCC or GND
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
and I
include the input leakage current.
OZL
IOH = –24 mA 2 2
IOH = –32 mA 2* 2
IOL = 48 mA 0.55 0.55
IOL = 64 mA 0.55* 0.55
100 mV
=
or
I
CC
Outputs high 50 50 50 µA
Outputs high 5 250 250 250 µA
Outputs low 24 30 30 30 mA
Outputs disabled 0.5 250 250 250 µA
Outputs enabled 1.5 1.5 1.5
Outputs disabled 0.05 0.05 0.05
±1 ±1 ±1
±100 ±100 ±100
1.5 1.5 1.5
µ
mA
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
(INPUT)
(OUTPUT)
A or B
B or A
ns
OEBA
A
ns
OEBA
A
ns
OEAB
B
ns
OEAB
B
ns
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
= 50 pF (unless otherwise noted) (see Figure 1)
L
FROM
TO
VCC = 5 V,
TA = 25°C
MIN MAX MIN MAX MIN MAX
1 4.1 1 1 4.8
1 4.3 1 1 4.8
1.3 4.6 1.3 1.3 5.5
1 6.1 1 1 7.1
2 6.3 2 2 7
1.4 5.4 1.4 1.4 5.8
1.6 6.2 1.6 1.6 6.8
2 5.9 2 2 6.4
1.2 5.6 1.2 1.2 6.5
1.1 4.7 1.1 1.1 5.6
SN54ABT620 SN74ABT620
UNIT
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
500 Ω
S1
7 V
GND
Open
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
7 V
Open
LOAD CIRCUIT
t
w
Input
Input
Output
Output
INVERTING AND NONINVERTING OUTPUTS
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V 1.5 V
t
PLH
1.5 V
t
PHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
t
PHL
1.5 V
t
PLH
1.5 V1.5 V
3 V
0 V
3 V
0 V
V
V
V
V
OH
OL
OH
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
t
PZL
t
PLZ
1.5 V
t
t
PZH
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
PHZ
1.5 V
VOLTAGE WAVEFORMS
t
h
1.5 V
VOL + 0.3 V
VOH – 0.3 V
3 V
0 V
3 V
0 V
3 V
0 V
3.5 V
V
OL
V
OH
[
0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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