ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
T ypical V
at V
D
High-Drive Outputs (–32-mA IOH,
= 5 V, TA = 25°C
CC
64-mA I
D
Package Options Include Plastic
(Output Ground Bounce) < 1 V
OLP
)
OL
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (N) and Ceramic (J) DIPs
description
These octal bus transceivers provide for
asynchronous communication between data
buses. The control-function implementation
allows for maximum flexibility in timing. The
’ABT620 devices provide inverted data at the
outputs.
These devices allow data transmission from the
A bus to the B bus or from the B bus to the A bus,
depending on the logic levels at the output-enable
(OEAB and OEBA
) inputs.
SN74ABT620 . . . DB, DW, N, OR PW PACKAGE
SN54ABT620 ...J PACKAGE
(TOP VIEW)
OEAB
GND
SN54ABT620 . . . FK PACKAGE
A3
A4
A5
A6
A7
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
9
A8
10
(TOP VIEW)
A2A1OEAB
3212019
4
5
6
7
8
910111213
A8
GND
B8
20
19
18
17
16
15
14
13
12
11
V
CC
B7
V
CC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
B6OEBA
B1
B2
B3
B4
B5
The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The
dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB
and OEBA
. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines
are at high impedance, both sets of bus lines (16 total) remain at their last states. In this way, each output
reinforces its input in this configuration.
To ensure the high-impedance state during power up or power down, OEBA
should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sourcing capability of the driver.
The SN54ABT620 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT620 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABT620, SN74ABT620
OPERATION
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
FUNCTION TABLE
INPUTS
OEBA OEAB
LLB data to A bus
LH
HLIsolation
HHA data to B bus
B data to A bus,
A
data to B bus
19
1
2
3
4
5
6
7
8
9
†
EN1
EN2
1
1
12
18
17
16
15
14
13
12
11
logic symbol
OEBA
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
OEBA
OEAB
B1
B2
B3
B4
B5
B6
B7
B8
19
1
218
A1
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Voltage range applied to any output in the high or power-off state, V
Current into any output in the low state, I
Input clamp current, I
Output clamp current, I
Package thermal impedance, θ
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ABT620, SN74ABT620
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
4.5 V
VOLV
V
V
I
V
V
V
GND
A
V
CC
¶
D
,
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°CSN54ABT620 SN74ABT620
MIN TYP†MAXMINMAXMINMAX
V
IK
OH
V
hys
I
I
OZH
I
OZL
I
off
I
CEX
I
O
I
CC
∆I
C
C
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
All typical values are at VCC = 5 V.
‡
The parameters I
§
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Control inputs
A or B ports
‡
‡
§
A or B ports
ata inputs
CC
Control inputs
Control inputsVI = 2.5 V or 0.5 V4pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
(INPUT)
(OUTPUT)
A or B
B or A
ns
OEBA
A
ns
OEBA
A
ns
OEAB
B
ns
OEAB
B
ns
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
= 50 pF (unless otherwise noted) (see Figure 1)
L
FROM
TO
VCC = 5 V,
TA = 25°C
MINMAXMINMAXMINMAX
14.1114.8
14.3114.8
1.34.61.31.35.5
16.1117.1
26.3227
1.45.41.41.45.8
1.66.21.61.66.8
25.9226.4
1.25.61.21.26.5
1.14.71.11.15.6
SN54ABT620 SN74ABT620
UNIT
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54ABT620, SN74ABT620
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
500 Ω
S1
7 V
GND
Open
TESTS1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
7 V
Open
LOAD CIRCUIT
t
w
Input
Input
Output
Output
INVERTING AND NONINVERTING OUTPUTS
1.5 V1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V1.5 V
t
PLH
1.5 V
t
PHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
t
PHL
1.5 V
t
PLH
1.5 V1.5 V
3 V
0 V
3 V
0 V
V
V
V
V
OH
OL
OH
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
t
su
1.5 V1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
t
PZL
t
PLZ
1.5 V
t
t
PZH
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
PHZ
1.5 V
VOLTAGE WAVEFORMS
t
h
1.5 V
VOL + 0.3 V
VOH – 0.3 V
3 V
0 V
3 V
0 V
3 V
0 V
3.5 V
V
OL
V
OH
[
0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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