Texas Instruments SN74ABT16640DGGR, SN74ABT16640DL, SN74ABT16640DLR, SNJ54ABT16640WD Datasheet

SN54ABT16640, SN74ABT16640

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS107C – APRIL 1992 – REVISED JANUARY 1997

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Members of the Texas Instruments

Widebus

 Family

D

State-of-the-Art

EPIC-ΙΙB

 BiCMOS Design

Significantly Reduces Power Dissipation

D

Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17

D

T ypical V

OLP

(Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

D

Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise

D

Flow-Through Architecture Optimizes PCB
Layout

D

High-Drive Outputs (–32-mA IOH,
64-mA IOL)

D

Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages, and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings

description

The ’ABT16640 are inverting 16-bit transceivers
designed for asynchronous communication
between data buses.

These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. It allows
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic
level at the direction-control (1DIR and 2DIR)
inputs. The output-enable (1OE

and 2OE) inputs
can be used to disable the device so that the
buses are effectively isolated.

T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT16640 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16640 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each 8-bit section)

INPUTS

OE

DIR

OPERATION

L L B data to A bus
L HA data to B bus
H X Isolation

Copyright  1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

1DIR

1B1
1B2

GND

1B3
1B4

V

CC

1B5
1B6

GND

1B7
1B8
2B1
2B2

GND

2B3
2B4

V

CC

2B5
2B6

GND

2B7
2B8

2DIR

1OE
1A1
1A2
GND
1A3
1A4
V

CC

1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V

CC

2A5
2A6
GND
2A7
2A8
2OE

SN54ABT16640 . . . WD PACKAGE

SN74ABT16640 . . . DGG OR DL PACKAGE

(TOP VIEW)

SN54ABT16640, SN74ABT16640
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCBS107C – APRIL 1992 – REVISED JANUARY 1997

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

1OE

1A1

47

1B1

2

1B6

9

1B7

11

1B8

12

1B2

3

1B3

5

1B4

6

1B5

8

1

2

2A1

36

2B1

13

2B6

20

2B7

22

2B8

23

2B2

14

2B3

16

2B4

17

2B5

19

4

5

1
1

1
1

G3

48

3 EN2 [AB]

3 EN1 [BA]

1

1DIR

G6

25

6 EN5 [AB]

6 EN4 [BA]

24

2DIR

2OE

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

logic diagram (positive logic)

1OE

1DIR

1A1

1B1

247

1

48

To Seven Other Channels

2OE

2DIR

2A1

2B1

1336

24

25

To Seven Other Channels

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

‡

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .

Current into any output in the low state, IO: SN54ABT16640 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74ABT16640 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

IK

(V

I

< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

OK

(V

O

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

JA

(see Note 2): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51.

SN54ABT16640, SN74ABT16640

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS107C – APRIL 1992 – REVISED JANUARY 1997

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54ABT16640 SN74ABT16640

MIN MAX MIN MAX

UNIT

V

CC

Supply voltage 4.5 5.5 4.5 5.5 V

V

IH

High-level input voltage 2 2 V

V

IL

Low-level input voltage 0.8 0.8 V

V

I

Input voltage 0 V

CC

0 V

CC

V

I

OH

High-level output current –24 –32 mA

I

OL

Low-level output current 48 64 mA
∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V
T

A

Operating free-air temperature –55 125 –40 85 °C

NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.