Texas Instruments SN74ABT16501DGGR, SN74ABT16501DL, SN74ABT16501DLR Datasheet

SN54ABT16501, SN74ABT16501

18-BIT UNIVERSAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS086C – FEBRUARY 1991 – REVISED JANUARY 1997

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Members of the Texas Instruments

Widebus

 Family

D

State-of-the-Art

EPIC-ΙΙB

 BiCMOS Design

Significantly Reduces Power Dissipation

D

UBT

 (Universal Bus Transceiver)

Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode

D

ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D

Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17

D

T ypical V

OLP

(Output Ground Bounce)

< 0.8 V at V

CC

= 5 V, TA = 25°C

D

Flow-Through Architecture Optimizes PCB
Layout

D

Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings

description

These 18-bit universal bus transceivers consist of
storage elements that can operate either as
D-type latches or D-type flip-flops to allow data
flow in transparent or clocked modes.

Data flow in each direction is controlled by
output-enable (OEAB and OEBA

), latch-enable
(LEAB and LEBA), and clock (CLKAB and
CLKBA) inputs. For A-to-B data flow, the device
operates in the transparent mode when LEAB is
high. When LEAB is low, the A data is latched if
CLKAB is held at a high or low logic level. If LEAB
is low, the A data is stored in the latch/flip-flop on
the low-to-high transition of CLKAB. When OEAB
is high, the outputs are active. When OEAB is low,
the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA

, LEBA, and CLKBA. The output enables are

complementary (OEAB is active high and OEBA

is active low).

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor and OE

should be tied to VCC through a pullup resistor; the minimum value of the resistor is

determined by the current-sourcing/current-sinking capability of the driver.

Copyright  1997, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus, EPIC-ΙΙB, and UBT are trademarks of Texas Instruments Incorporated.

SN54ABT16501 . . . WD PACKAGE

SN74ABT16501 . . . DGG OR DL PACKAGE

(TOP VIEW)

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OEAB

LEAB

A1

GND

A2
A3

V

CC

A4
A5
A6

GND

A7
A8

A9
A10
A11
A12

GND

A13
A14
A15

V

CC

A16
A17

GND

A18

OEBA

LEBA

GND
CLKAB
B1
GND
B2
B3
V

CC

B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
V

CC

B16
B17
GND
B18
CLKBA
GND

SN54ABT16501, SN74ABT16501
18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCBS086C – FEBRUARY 1991 – REVISED JANUARY 1997

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

The SN54ABT16501 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16501 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

†

INPUTS

OUTPUT

OEAB LEAB CLKAB A

B

L X X X Z
H HXLL
H HXHH
H L ↑ LL
H L ↑ HH
H LHXB

0

‡

H L L X B

0

§

†

A-to-B data flow is shown: B-to-A flow is similar but
uses OEBA

, LEBA, and CLKBA.

‡

Output level before the indicated steady-state input
conditions were established, provided that CLKAB
was high before LEAB went low

§

Output level before the indicated steady-state input
conditions were established

SN54ABT16501, SN74ABT16501

18-BIT UNIVERSAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS086C – FEBRUARY 1991 – REVISED JANUARY 1997

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

A2

5

EN1

1

OEAB

2C3

3D

3

A1 B1

54

A14

20

A15

21

A16

23

A17

24

A8

13

A9

14

A10

15

A11

16

A12

17

A3

6

A4

8

A5

9

A6

10

A7

12

B13

38

B14

37

B15

36

B16

34

B17

33

B18

31

6D

4

A18

26

B8

44

B9

43

B10

42

B11

41

B12

40

B3

51

B4

49

B5

48

B6

47

B7

45

B2

52

C6

28

LEBA

G5

30

CLKBA

EN4

27

C3

2

LEAB

G2

55

CLKAB

5C6

OEBA

11

1

A13

19