Texas Instruments SN65LVDM31D, SN65LVDM31DR Datasheet
SN65LVDM31
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS417 – MARCH 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Designed for Signaling Rates† up to
150 Mbps
D
Low-Voltage Differential Signaling With
Typical Output Voltage of 700 mV and a
100-Ω Load
D
Propagation Delay Time of 2.3 ns, Typical
D
Single 3.3-V Supply Operation
D
One Driver’s Power Dissipation at 75 MHz,
50 mW, Typical
D
High Impedance Outputs When Disabled or
With V
CC
< 1.5 V
D
Bus-Pin ESD Protection Exceeds 12 kV
D
Low-Voltage CMOS (LVCMOS) Logic Input
Levels Are 5-V Tolerant
description
The SN65LVDM31 incorporates four differential
line drivers that implement the electrical characteristics of low-voltage differential signaling. This
product offers a low-power alternative to 5-V
PECL drivers with similar signal levels. Any of the
four current-mode drivers will deliver a minimum
differential output voltage magnitude of 540 mV
into a 100-Ω load when enabled by either an
active-low or active-high enable input.
The intended application of this device and
signaling technique is for both point-to-point and
multiplexed baseband data transmission over
controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board
traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media and the noise coupling to the environment.
The SN65LVDM31 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUT
ENABLES OUTPUTS
A G G Y Z
H H X H L
L H X L H
H X L H L
L X L L H
X L H Z Z
Open H X L H
Open X L L H
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
The signaling rate is the number of voltage transitions that can be made per second.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A
1Y
1Z
G
2Z
2Y
2A
GND
V
CC
4A
4Y
4Z
G
3Z
3Y
3A
D PACKAGE
(TOP VIEW)
functional block diagram
1Y
G
G
1A
2A
3A
4A
2Y
3Y
4Y
4
12
1
7
9
15
2
3
6
5
10
11
14
13
1Z
2Z
3Z
4Z
SN65LVDM31
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS417 – MARCH 2000
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent input and output schematic diagrams
50 Ω
300 kΩ
V
CC
7 V
A Input
50 Ω
V
CC
7 V
Y or Z
Output
10 kΩ
G, G
1,2EN, or
3,4EN or
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Supply voltage range (see Note 1) VCC –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI –0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VOY or VOZ –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic discharge, (see Note 2): Y, Z, and GND Class 3, A:12 kV, B:600 V. . . . . . . . . . . . . . . . . . . . . . . .
All pins Class 3, A:7 kV, B:500 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING T ABLE
PACKAGE
TA ≤ 25°C
POWER RATING
OPERATING FACTOR
‡
ABOVE TA = 25°C
TA = 85°C
POWER RATING
D 950 mW 7.6 mW/°C 494 mW
‡
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with
no air flow.
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
CC
3 3.3 3.6 V
High-level input voltage, V
IH 2.5
V
Low-level input voltage, V
IL 0.9
V
Operating free-air temperature, T
A
–40 85 °C
SN65LVDM31
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS417 – MARCH 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
p
RL = 100 Ω, See Figure 2 540 700 860
|VOD|
Differential output voltage magnitude
RL = 50 Ω, See Figure 2 270 350 430
mV
∆|VOD|
Change in differential output voltage magnitude
between logic states
See Figure 2 –25 0 25 mV
V
OC(SS)
Steady-state common-mode output voltage 1.14 1.2 1.3 V
∆V
OC(SS)
Change in steady-state common-mode output
voltage between logic states
See Figure 3
–30 0 30
mV
V
OC(PP)
Peak-to-peak common-mode output voltage 70 100
mV
Enabled, No load 6 10
I
CC
Supply current
Enabled,
RL = 100 Ω
VIN = 0 or V
CC
35 40
mA
Disabled 0.5 0.7
I
IH
High-level input current VIH = 3 V –10 3 10 µA
I
IL
Low-level input current VIL = 0 V –10 0 10 µA
p
VOY or VOZ = 0 V 7 10
IOSShort-circuit output current
VOD = 0 V 7 10
mA
I
OZ
High-impedance state output current VO = 0 V or V
CC
±1 µA
I
O(OFF)
Power-off output current VCC = 1.5 V, VO = 3.6 V ±1 µA
†
All typical values are at 25°C and with a 3.3 V supply.
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output 1.8 2.3 2.9 ns
t
PHL
Propagation delay time, high-to-low-level output 1.8 2.3 2.9 ns
t
r
Differential output signal rise time
0.4 0.6 1.0 ns
t
f
Differential output signal fall time
See Figure 4
0.4 0.6 1.0 ns
t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|) 50 350 ns
t
sk(o)
Channel-to-channel output skew (see Note 3) 200 ns
t
sk(pp)
Part-to-part skew (see Note 4) 1 ns
t
PZH
Propagation delay time, high-impedance-to-high-level output 6 15 ns
t
PZL
Propagation delay time, high-impedance-to-low level output
See Figure 5
6 15 ns
t
PHz
Propagation delay time, high-level-to-high-impedance output 6 15 ns
t
PLZ
Propagation delay time, low-level-to-high-impedance output 6 15 ns
NOTES: 3. t
sk(o)
is the maximum delay time difference between drivers on the same device.
4. t
sk(pp)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both
devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
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