Texas Instruments SN65LVDM176D, SN65LVDM176DGK, SN65LVDM176DGKR, SN65LVDM176DR Datasheet

D

Low-Voltage Differential Driver and
Receiver for Half-Duplex Operation

D

Designed for Signaling Rates of 400 Mbit/s

D

ESD Protection Exceeds 15 kV on Bus Pins

D

Operates from a Single 3.3 V Supply

D

Low–Voltage Differential Signaling with
Typical Output Voltages of 350 mV and a
50Ω Load

D

Propagation Delay Times
– Driver: 1.7 ns Typ
– Receiver: 3.7 ns Typ

D

Power Dissipation at 200 MHz
– Driver: 50 mW Typical
– Receiver: 60 mW Typical

D

LVTTL Levels are 5 V Tolerant

D

Bus Pins are High Impedance When
Disabled or With V

D

Open-Circuit Fail-Safe Receiver

D

Surface-Mount Packaging

Less Than 1.5 V

CC

– D Package (SOIC)
– DGK Package (MSOP)

description

SN65LVDM176

HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

SN65LVDM176D (Marked as DM176 or LVM176)

SN65LVDM176DGK (Marked as M76)

(TOP VIEW)

1

R

2

RE

3

DE

4

D

logic diagram (positive logic)

3

DE

4

D

2

RE

1

R

8

V

CC

7

B

6

A

5

GND

6

A

7

B

The SN65L VDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage
differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to
TIA/EIA-644 standard compliant devices (SN65L VDS) counterparts except that the output current of the drivers
is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50Ω
load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference
of less than 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for half-duplex or multiplex baseband data
transmission over controlled impedance media of approximately 100-Ω characteristic impedance. The
transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and
distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to
the environment, and other application specific characteristics).

The SN65LVDM176 is characterized for operation from –40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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Copyright  2000, Texas Instruments Incorporated

1

SN65LVDM176
HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

AVAILABLE OPTIONS

T

A

–40°C to 85°C SN65LVDM176D SN65LVDM176DGK

†

The D package is available taped and reeled. Add the suffix R to the device type
(e.g., SN65LVDM176DR).

H = high level, L = low level, X = irrelevant,
Z = high impedance

SMALL OUTLINE

(D)

†

Function Tables

DRIVER

INPUT ENABLE

D DE

L H L H

H H H L

Open H L H

X L Z Z

PACKAGE

OUTPUTS

A B

MSOP

(DGK)

†

RECEIVER

DIFFERENTIAL INPUTS

VID = VA – V

VID ≥ 100 mV L H

–100 mV < VID < 100 mV L ?

VID ≤ –100 mV L L

Open L H

H = high level, L = low level, X = irrelevant,
Z = high impedance

B

X H Z

ENABLE OUTPUT

RE R

2

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HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

equivalent input and output schematic diagrams

V

CC

300 kΩ

D or RE

Input

7 V

50 Ω

300 kΩ

DE

50 Ω

Input

7 V

SN65LVDM176

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

V

CC

V

CC

10 kΩ

5 Ω

Y or Z
Output

7 V

7 V

V

CC

300 kΩ300 kΩ

B InputA Input

7 V

V

CC

5 Ω

R Output

7 V

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3

SN65LVDM176
HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC (see Note 1) –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range (D, R, DE, RE) –0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (A, B , and GND) (see Note 2) CLass 3, A:15 kV, B:600 V. . . . . . . . . . . . . . . . . . . . . .

All terminals Class 3, A:7 kV, B:500 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T
Storage temperature range, T

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.

2. Tested in accordance with MIL-STD-883C Method 3015.7.

DISSIPATION RATING TABLE

PACKAGE

D 725 mW 5.8 mW/°C 377 mW

DGK 424 mW 3.4 mW/°C 220 mW

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 85°C

POWER RATING

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, V
High-level input voltage, V
Low-level input voltage, V
Magnitude of differential input voltage, VID 0.1 0.6 V

Common–mode input voltage, VIC (see Figure 1)

Operating free–air temperature, T

CC

IH

IL

A

3 3.3 3.6 V
2 V

0.8 V

Ť

Ť

V

ID

2

–40 85 °C

2.4

*

VCC–0.8

Ť

V

ID

2

Ť

V

†

4

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2.5

ICCSu ly current

mA

2

1.5

1

– Common-Mode Input Voltage – V

0.5

IC

V

SN65LVDM176

HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

COMMON-MODE INPUT VOLTAGE

vs

DIFFERENTIAL INPUT VOLTAGE

Max at VCC > 3.15 V

Max at VCC = 3 V

Min

0

0.1 0.3

0.2 0.40

|VID| – Differential Input Voltage – V

0.5 0.6

Figure 1

device electrical characteristics over recommended operating conditions (unless otherwise
noted)

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

I

Supply current

†

All typical values are at 25°C and with a 3.3-V supply.

Driver and receiver enabled, No receiver load,
Driver RL = 50 Ω

Driver enabled, Receiver disabled, RL = 50 Ω
Driver disabled, Receiver enabled, No load 1.8 5
Disabled 0.5 2

10 15

9 15

mA

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5

SN65LVDM176

R

50Ω

IIHHigh-level input current

V

V

A

IILLow-level input current

V

V

A

IOSShort-circuit output current

mA

See Figure 6

mV

IIInput current (A or B inputs)

‡

A

HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

SLLS320C – DECEMBER 1998 – REVISED MARCH 2000

driver electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VOD Differential output voltage magnitude

∆VOD
V

OC(SS)

∆V

OC(SS)

V

OC(PP)

C

I

†

The non-algebraic convention, where the more positive (least negative) limit is designated maximum, is used in this data sheet for this parameter.

Change in differential output voltage magnitude between logic
states

Steady-state common-mode output voltage 1.125 1.375 V
Change in steady-state common-mode output voltage between

logic states
Peak-to-peak common-mode output voltage 50 150 mV

p

p

Input capacitance 3 pF

†

†

p

†

DE
D
DE
D

=

,

L

See Figure 2 and Figure 3

See Figure 4

= 5

IH

= 0.8

IL

VOA or VOB = 0 V –10
VOD = 0 V

247 340 454
–50 50

–50 50 mV

0.5 10
2 20

–0.5 –10

2 10

mV

µ

µ

–10

receiver electrical characteristics over recommended operating conditions (unless otherwise
noted)

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

V

ITH+

V

ITH–

V

OH

V

OL

I

I(OFF)

I

IH

I

IL

I

OZ

†

All typical values are at 25°C and with a 3.3-V supply.

‡

The non-algebraic convention, where the more positive (least negative) limit is designated maximum, is used in this data sheet for this parameter.

Positive-going differential input voltage threshold
Negative-going differential input voltage threshold
High-level output voltage IOH = –8 mA 2.4 V
Low-level output voltage IOL = 8 mA 0.4 V

p

Power-off input current (A or B inputs) VCC = 0 V or 1.8 V 20 µA
High-level input current (enables) VIH = 5 V 10 µA
Low-level input current (enables) VIL = 0.8 V 10 µA
High-impedance output current

p

‡

VI = 0 V –2 –20
VI = 2.4 V –1.2

VO = 0 V or 5 V ±1 µA

–100

100

µ

6

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