The SN65LVDM179, SN65LVDM180,
SN65L VDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve signaling
rates as high as 400 Mbps. These circuits are
similar to TIA/EIA-644 standard compliant
devices (SN65LVDS) counterparts, except that
the output current of the drivers is doubled. This
modification provides a minimum differential
output voltage magnitude of 247 mV into a 50-Ω
load and allows double-terminated lines and
half-duplex operation. The receivers detect a
voltage difference of 100 mV with up to 1 V of
ground potential difference between a transmitter
and receiver.
The intended application of these devices and
signaling technique is half-duplex or multiplex
baseband data transmission over controlled
impedance media of approximately 100-Ω
characteristic impedance. The transmission
media may be printed-circuit board traces,
backplanes, or cables.
< 1.5 V
CC
SLLS324B – DECEMBER 1998 – REVISED MARCH 2000
SN65LVDM179D (Marked as DM179 or LVM179)
SN65LVDM179DGK (Marked as M79)
SN65LVDM180D (Marked as LVDM180)
GND
GND
SN65LVDM050D (Marked as LVDM050)
GND
SN65LVDM051D (Marked as LVDM051)
1DE
GND
V
CC
GND
NC
R
RE
DE
D
1B
1A
1R
RE
2R
2A
2B
1B
1A
1R
2R
2A
2B
R
D
(TOP VIEW)
1
2
3
4
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
7
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
A
8
B
7
Z
6
5
Y
V
CC
V
CC
A
B
D
R
D
DE
RE
Z
1D
DE
2D
R
15
12
Y
9
NC
8
V
CC
1D
1Y
1Z
DE
2Z
1R
2Y
9
2D
V
CC
1D
1Y
1Z
RE
2R
1D
1DE
1R
15
2DE
2Z
2Y
9
2D
2D
2DE
2R
12
3
2
5
4
3
2
9
3
4
5
4
3
9
5
5
Y
6
Z
8
A
7
B
9
Y
10
Z
12
A
11
B
14
1Y
13
1Z
10
2Y
11
2Z
2
1A
1
1B
6
2A
7
2B
14
1Y
13
1Z
2
1A
1
1B
10
2Y
11
2Z
6
2A
7
2B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLLS324B – DECEMBER 1998 – REVISED MARCH 2000
description (continued)
AVAILABLE OPTIONS
PACKAGE
T
A
°
–
°
The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media, the noise coupling to the environment, and other application
specific characteristics.
The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are characterized for operation
from –40°C to 85°C.
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 250°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLE
PACKAGE
D8725 mW5.8 mW/°C377 mW
D14 or D16950 mW7.8 mW/°C494 mW
DGK424 mW3.4 mW/°C220 mW
†
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
†
TA = 85°C
POWER RATING
recommended operating conditions
MINNOMMAXUNIT
Supply voltage, V
High-level input voltage, V
Low-level input voltage, V
Magnitude of differential input voltage, VID0.10.6V
Power-off input current (A or B inputs)VCC = 0±20µA
High-level input current (enables)VIH = 5 V10µA
Low-level input current (enables)VIL = 0.8 V10µA
High-impedance output currentVO = 0 or 5 V±10µA
Input capacitance5pF
Propagation delay time, low-to-high-level output1.72.7ns
Propagation delay time, high-to-low-level output1.72.7ns
Differential output signal rise time
Differential output signal fall time
Pulse skew (|t
Channel-to-channel output skew
Propagation delay time, high-impedance-to-high-level output610ns
Propagation delay time, high-impedance-to-low-level output
Propagation delay time, high-level-to-high-impedance output
Propagation delay time, low-level-to-high-impedance output510ns
is the maximum delay time difference between drivers on the same device.
p
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
– t
pLH
|)
‡
pHL
VI = 0–2–11–20
VI = 2.4 V–1.2–3
RL = 50Ω,
= 10 pF,
p
L
Figure
–100
250ps
100ps
100
0.61ns
0.61ns
610ns
410ns
µ
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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