Texas Instruments SN65LBC184D, SN65LBC184DR, SN65LBC184P, SN75LBC184D, SN75LBC184DR Datasheet

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SN65LBC184, SN75LBC184
DIFFERENTIAL TRANSCEIVER
WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MA Y 1998
D
Integrated Transient Voltage Suppression
D
D
Circuit Damage Protection of 400 W Peak (Typical)
D
Controlled Driver Output-Voltage Slew Rates Allows Longer Cable Stub Lengths
D
250-kbits/s in Electrically Noisy Environments
D
Open-Circuit Fail-Safe Receiver Design
D
1/2 Unit Load Allows for 64 Devices Connected on Bus
D
Thermal Shutdown Protection
D
Power-Up/-Down Glitch Protection
D
Each Transceiver Meets or Exceeds the Requirements of EIA RS-485 and ISO/IEC 8482:1993(E) Standards
D
Low Disabled Supply Current 300 µA Max
D
Pin Compatible with SN75176
description
The SN75LBC184 and SN65LBC184 are differ­ential data line transceivers in the trade-standard footprint of the SN75176 with built-in protection against high-energy noise transients. This feature provides a substantial increase in reliability for better immunity to noise transients coupled to the data cable over most existing devices. Use of these circuits provides a reliable low-cost direct-coupled (with no isolation transformer) data line interface without requiring any external components.
The SN75LBC184 and SN65LBC184 can with­stand overvoltage transients of 400 W peak (typical). The conventional combination wave called out in CEI IEC 1000-4-5 simulates the overvoltage transient and models a unidirectional surge caused by overvoltages from switching and secondary lightning transients.
D OR P PACKAGE
(TOP VIEW)
V
8
CC
B
7
A
6
GND
5
RE DE
R
1 2 3
D
4
functional logic diagram (positive logic)
3
DE
4
D
2
RE
1
R
V
± V
P
± 1/2 V
P
1.2 µs 50 µs
Figure 1. Surge Waveform — Combination Wave
6
A
7
Bus
B
t
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
SN65LBC184, SN75LBC184 DIFFERENTIAL TRANSCEIVER WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MA Y 1998
description (continued)
A biexponential function defined by separate rise and fall times for voltage and current simulates the combination wave. The standard 1.2 µs/50 µs combination waveform is shown in Figure 1 and in the test description in Figure 9.
The device also includes additional desirable features for party-line data buses in electrically noisy environment applications including industrial process control. The differential-driver design incorporates slew-rate-controlled outputs sufficient to transmit data up to 250 kbits/s. Slew-rate control allows longer unterminated cable runs and longer stub lengths from the main backbone than possible with uncontrolled and faster voltage transitions. A unique receiver design provides a fail-safe output of a high level when the inputs are left floating (open circuit). The SN75LBC184 and SN65LBC184 receiver also includes a high input resistance equivalent to one-half unit load allowing connection of up to 64 similar devices on the bus.
The SN75LBC184 is characterized for operation from 0°C to 70°C. The SN65LBC184 is characterized from –40°C to 85°C.
DRIVER FUNCTION TABLE
INPUT
D DE A B
H H H L
L H L H
X L Z Z
H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off)
ENABLE OUTPUTS
RECEIVER FUNCTION TABLE
DIFFERENTIAL INPUTS ENABLE OUTPUT
A – B RE R
VID 0.2 V L H
–0.2 V < VID < 0.2 V L ?
VID –0.2 V L L
X H Z
Open L H
H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off)
logic symbol
DE RE
D
R
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3
EN1
2
EN2
4
1
2
1 1
6 7
A B
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN65LBC184, SN75LBC184
PACKAGE
A
A
High-level output current, I
Low-level output current, I
mA
O erating free-air tem erature, T
A
DIFFERENTIAL TRANSCEIVER
WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MA Y 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Continuous voltage range at any bus terminal –15 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data input/output voltage –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic discharge:
Continuous total power dissipation (see Note 2) Internally Limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
2. The driver shuts down at a junction temperature of approximately 160°C. To operate below this temperature, see the Dissipation Rating Table.
3. GND and bus terminal ESD ratings are beyond readily available test equipment capabilities for MIL-STD-883C method 3015.3.
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
All Terminals (Class 3 A) (see Note 3) 8 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
All Terminals (Class 3 B) (see Note 3) 1200 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
: SN65LBC184 – 40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN75LBC184 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
DISSIPATION RATING TABLE
T
25°C DERATING FACTOR
POWER RATING ABOVE TA = 25°C
D 725 mW 5.8 mW/°C 464 mW 377 mW P 1150 mW 9.2 mW/°C 736 mW 598 mW
T
= 70_C T
POWER RATINGAPOWER RATING
= 85_C
recommended operating conditions
MIN TYP MAX UNIT
Supply voltage, V Voltage at any bus terminal (separately or common mode), VI or V High-level input voltage, V Low-level input voltage, V Differential input voltage, |VID| 12 V
p
The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for input voltage, common-mode input voltage, common-mode output voltage, and free-air temperature levels only.
CC
IC
IH
IL
p
p
OH
OL
p
D, DE, and RE 2 V D, DE, and RE 0.8 V
Driver –60 mA Receiver –8 mA Driver 60 Receiver 4 SN75LBC184 0 70 °C SN65LBC184 –40
4.75 5 5.25 V ‡
–7
12 V
85 °C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
SN65LBC184, SN75LBC184
,
mA
RE
A
Short-ci
t
(
)
(see Note 5)
voltage |V
A
VB| (see Note 4)
L
,
DIFFERENTIAL TRANSCEIVER WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MA Y 1998
DRIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
I
CC
I
IH
I
IL
I
OS
I
OZ
V
O
V
OC(PP)
V
OC
|V
OC(SS)
|VOD|
|VOD|
All typical values are measured with TA = 25°C and VCC = 5 V.
IO = Iia, Iib. Iia and Iib are alternate symbols for input voltage.
NOTES: 4. The minimum VOD specification of the SN75LBC184 and the SN65LBC184 may not fully comply with ANSI RS-485 at operating
Supply current NA
High-level input current (D, DE, RE) NA VI = 2.4 V ±100 µA Low-level input current (D, DE, RE) NA VI = 0.4 V ±100 µA
rcuit output curren
see Note 5
High-impedance output current NA See Receiver I Output voltage Voa, V Peak-to-peak change in common-
mode output voltage during state transitions
Common-mode output voltage |Vos| See Figure 4 1 3 V Magnitude of change, common-
|
mode steady-state output voltage
Magnitude of differential output
Change in differential voltage mag­nitude between logic states
temperature below 0°C. System designers should take the possibly lower output signal into account in determining the maximum signal-transmission distance.
5. This parameter is measured with only one output being driven at a time.
ALTERNATE
SYMBOLS
NA
ob
NA
|Vos – Vos| See Figure 5 0.2 V
V
o
||Vt| – |Vt|| RL = 54 0.2 V
TEST CONDITIONS MIN
DE = RE = 5 V, No Load
DE = 0 V,
= 5 V,
No Load
VO = –7 V –120 –250 VO = V
CC
VO = 12 V 250
IO= 0
See Figures 5 and 6 0.8 V
IO = 0 1.5 6 V R
= 54 ,
See Figure 4
SN75LBC184 12 25 SN65LBC184 12 30
SN75LBC184 175 300 SN65LBC184 175 300
TA 0°C 1.5 V TA < 0°C 1 V
TYP
0 6 V
MAX UNIT
250
mA
I
mA
µ
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN65LBC184, SN75LBC184
L
,
g
R
C
See Figure 5
DIFFERENTIAL TRANSCEIVER
WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MA Y 1998
DRIVER SECTION (CONTINUED)
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
d(DH)
t
d(DL)
t
PLH
t
PHL
t
sk(p)
t
r
t
f
t
PZH
t
PZL
t
PHZ
t
PLZ
Differential output delay time, low-to-high­level output
Differential-output delay time, high-to-low­level output
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|t Rise time, single ended Fall time, single ended Output enable time to high level RL = 110 Ω, See Figure 2 3.5 µs Output enable time to low level RL = 110 Ω, See Figure 3 3.5 µs Output disable time from high level RL = 110 Ω, See Figure 2 2 µs Output disable time from low level RL = 110 Ω, See Figure 3 2 µs
d(DH)
– t
|) 75 225 ns
d(DL)
R
= 54 , See Figure 5
CL = 15 pF
= 54 Ω,
L
= 15 pF,
L
p
0.25 1.8 µs
0.25 1.8 µs
1.5 µs
1.5 µs
0.5 1.5 µs
0.5 1.5 µs
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