Datasheet SN65LBC174N, SN65LBC174DW, SN65LBC174DWR, SN75LBC174DW, SN75LBC174DWR Datasheet (Texas Instruments)

SN65LBC174, SN75LBC174

QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Meets or Exceeds the Standard EIA-485

D

Designed for High-Speed Multipoint
Transmission on Long Bus Lines in Noisy
Environments

D

Supports Data Rates up to and Exceeding
Ten Million Transfers Per Second

D

Common-Mode Output Voltage Range of
–7 V to 12 V

D

Positive- and Negative-Current Limiting

D

Low Power Consumption...1.5 mA Max
(Output Disabled)

D

Functionally Interchangeable With SN75174

description

The SN65LBC174 and SN75LBC174 are
monolithic, quadruple, differential line drivers with
3-state outputs. Both devices are designed to
meet the requirements of the Electronics Industry
Association Standard EIA-485. These devices
are optimized for balanced multipoint bus
transmission at data rates up to and exceeding
10 million bits per second. Each driver features
wide positive and negative common-mode output
voltage ranges, current limiting, and thermal­shutdown protection, making it suitable for
party-line applications in noisy environments.
Both devices are designed using LinBiCMOS,
facilitating ultra-low power consumption and
inherent robustness.

Both the SN65LBC174 and SN75LBC174 provide
positive- and negative-current limiting and
thermal shutdown for protection from line fault
conditions on the transmission bus line. These
devices offer optimum performance when used
with the SN75LBC173 or SN75LBC175
quadruple line receivers. The SN65LBC174 and
SN75LBC174 are available in the 16-terminal DIP
package (N) and the 20-terminal wide-body small
outline intergrated circuit (SOIC) package (DW).

The SN75LBC174 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC174 is characterized over the industrial temperature range of –40°C to 85°C.

LinBiCMOS is a trademark of Texas Instruments Incorporated.

Copyright  1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

1A
1Y
1Z

1,2EN

2Z
2Y
2A

GND

V

CC

4A
4Y
4Z
3,4EN
3Z
3Y
3A

N PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

1A
1Y

NC

1Z

1,2EN

2Z

NC

2Y
2A

GND

V

CC

4A
4Y
NC
4Z
3,4EN
3Z
NC
3Y
3A

DW PACKAGE

(TOP VIEW)

NC – No internal connection

FUNCTION TABLE

(each driver)

INPUT ENABLE

OUTPUTS

YZ

H

L

X

H = high level, L = low level,
X = irrelevant, Z = high impedance (off)

H
H
L

HL

LH
ZZ

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

†

This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

Terminal numbers shown are for the N package.

EN

EN

4A

3A

3,4EN

2A

1A

1,2EN

15

9

12

7

1

4

4Z

4Y

3Z

3Y

2Z

2Y

1Z

1Y

13

14

11

10

5

6

3

2

logic diagram (positive logic)

1A

1Y
1Z

2A

2Y
2Z

1,2EN

3A

3Y
3Z

4A

4Y
4Z

3,4EN

1

4

7

9

12

15

13

14

11

10

5

6

3

2

schematic of inputs and outputs

Input

50 µA

V

CC

Driver

Output

V

CC

200 Ω

ALL INPUTS Y OR Z OUTPUT

SN65LBC174, SN75LBC174

QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

†

Supply voltage range, V

CC

(see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, V

O

–10 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation Internally limited

‡

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

A

: SN65LBC174 –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN75LBC174 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡

The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.

NOTE 1: All voltage values are with respect to GND.

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, V

CC

4.75 5 5.25 V

High-level input voltage, V

IH

2 V

Low-level input voltage, V

IL

0.8 V

p

12

Voltage at any bus terminal (separately or common-mode), V

O

Y or Z–7V

High-level output current, I

OH

Y or Z –60 mA

Low-level output current, I

OL

Y or Z 60 mA

Continuous total power dissipation See Dissipation Rating Table

p

p

SN65LBC174 –40 85

°

Operating free-air temperature, T

A

SN75LBC174 0 70

°C

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

DW 1125 mW 9.0 mW/°C 720 mW 585 mW

N 1150 mW 9.2 mW/°C 736 mW 598 mW

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

V

IK

Input clamp voltage II = –18 mA –1.5 V

R

= 54 Ω,

SN65LBC174 1.1 1.8 5

L

,

See Figure 1

SN75LBC174 1.5 1.8 5

|VOD|

Diff

erential output voltage

‡

R

= 60 Ω,

SN65LBC174 1.1 1.7 5

V

L

,

See Figure 2

SN75LBC174 1.5 1.7 5

∆|VOD|

Change in magnitude of common-mode output voltage

§

±0.2 V

3

V

OC

C

ommon-mode output voltage

R

L

= 54 Ω,

See Figure 1

–1

V

∆|VOC|

Change in magnitude of common-mode output voltage

§

±0.2 V

I

O

Output current with power off VCC = 0, VO = – 7 V to 12 V ±100 µA

I

OZ

High-impedance-state output current VO = – 7 V to 12 V ±100 µA

I

IH

High-level input current VI = 2.4 V –100 µA

I

IL

Low-level input current VI = 0.4 V –100 µA

I

OS

Short-circuit output current VO = –7 V to 12 V ±250 mA

pp

Outputs enabled 7

ICCSupply current (all drivers)

No load

Outputs disabled 1.5

mA

†

All typical values are at VCC = 5 V and TA = 25°C.

‡

The minimum VOD specification does not fully comply with EIA-485 at operating temperatures below 0°C. The lower output signal should be used
to determine the maximum signal transmission distance.

§

∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.

switching characteristics, VCC = 5 V, TA = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

d(OD)

Differential output delay time

2 11 20 ns

t

t(OD)

Differential output transition time

R

L

= 54 Ω,

See Figure 3

10 15 25 ns

t

PZH

Output enable time to high level RL = 110 Ω, See Figure 3 30 ns

t

PZL

Output enable time to low level RL = 110 Ω, See Figure 5 30 ns

t

PHZ

Output disable time from high level RL = 110 Ω, See Figure 4 50 ns

t

PLZ

Output disable time from low level RL = 110 Ω, See Figure 5 30 ns

SN65LBC174, SN75LBC174

QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

V

OC

2

R

L

2

R

L

V

OD2

Figure 1. Differential and Common-Mode Output Voltages

R2 = 375 Ω

V

OD

RL = 60 Ω

V

test

V

test

0 V or 3 V

A

R1 = 375 Ω

Y

Z

–7 V < V

test

< 12 V

EN at 5 V

Figure 2. Driver VOD Test Circuit

VOLTAGE WAVEFORMS

50%

t

t(OD)

t

d(OD)

10%

t

t(OD)

≈ 2.5 V

≈ – 2.5 V

90%

50%

Output

t

d(OD)

0 V

3 V

Input

Output

1.5 V 1.5 V

TEST CIRCUIT

CL = 50 pF

(see Note B)

RL = 54 Ω

50 Ω

(see Note A)

Generator

3 V

Input

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns,

tf ≤ 5 ns, ZO = 50 Ω.

B. CL includes probe and stray capacitance.

Figure 3. Time Waveforms for Driver Differential Output Test Circuit Delay and Transition

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

RL = 110 Ω

VOLTAGE WAVEFORMS

TEST CIRCUIT

Output

Input

t

PZH

1.5 V

2.3 V

0.5 V

t

PHZ

1.5 V

V

OH

V

off

≈ 0 V

0 V

3 V

Output

3 V or 0 V

S1

CL = 50 pF

(see Note B)

Generator

(see Note A) 50 Ω

Input

Figure 4. t

PZH

and t

PHZ

Test Circuit and Waveforms

VOLTAGE WAVEFORMS

TEST CIRCUIT

5 V

V

OL

t

PLZ

2.3 V

0 V or 3 V

Generator

(see Note A)

RL = 110 Ω

Output

S1

CL = 50 pF

(see Note B)

50 Ω

Input

Output

Input

t

PZL

1.5 V

5 V

1.5 V
0 V

3 V

0.5 V

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns,

tf ≤ 5 ns, ZO = 50 Ω.

B. CL includes probe and stray capacitance.

Figure 5. t

PZL

and t

PLZ

Test Circuit and Waveforms

SN65LBC174, SN75LBC174

QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 6

IO – Output Current – A

VO – Output Voltage – V

OUTPUT CURRENT

vs

OUTPUT VOLTAGE

Output Disabled
TA = 25°C

40
30
20
10

0
–10
–20
–30
–40

20151050–5–10–15–20

–50

25

50

–25

I

O

VCC = 5 V

VCC = 0 V

µ

Figure 7

IOL – Low-Level Output Current – mA

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

– Low-Level Output Voltage – V

OL

V

3.5

3

2.5

2

1.5

1

0.5

8060

4020

0

4

0 100

VCC = 5 V
TA = 25°C

4.5

5

120

–20

Figure 8

3

2.5

2

1.5

1

0.5

4020

0–20–40

0

60

TA – Free-Air Temperature – °C

– Differential Output Voltage – V

–60

DIFFERENTIAL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

V

OD

80 100

RL = 54 Ω
VCC = 5 V

Figure 9

IOH – High-Level Output Current – mA

– High-Level Output Voltage – V

4.5

4

3.5

3

2.5

2

1.5

5

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

–40–20 –600

V

OH

–80

–100

VCC = 5 V
TA = 25°C

–120

20

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 10

IO – Output Current – mA

DIFFERENTIAL OUTPUT VOLTAGE

vs

OUTPUT CURRENT

3

2.5

2

1.5

1

0.5

90807060

5040302010

0

– Differential Output Voltage – V

0

OD

V

100

VCC = 5 V
TA = 25°C

Figure 11

TA – Free-Air Temperature – °C

PROPAGATION DELAY TIME,

DIFFERENTIAL OUTPUT

vs

FREE-AIR TEMPERATURE

11

10

9

8

7

6

5

1008060

40200–20–40

4

12

Propagation Delay Time,

–60

13

14

RL = 54 Ω
CL = 50 pF
VCC = 5 V

t –

pd(OD)

Differential Output – ns

SN65LBC174, SN75LBC174

QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

16 PIN SHOWN

4040000/D 02/98

Seating Plane

0.400 (10,15)

0.419 (10,65)

0.104 (2,65) MAX

1

0.012 (0,30)

0.004 (0,10)

A

8

16

0.020 (0,51)

0.014 (0,35)

0.293 (7,45)

0.299 (7,59)

9

0.010 (0,25)

0.050 (1,27)

0.016 (0,40)

(15,24)

(15,49)

PINS **

0.010 (0,25) NOM

A MAX

DIM

A MIN

Gage Plane

20

0.500

(12,70)

(12,95)

0.510

(10,16)

(10,41)

0.400

0.410

16

0.600

24

0.610

0.004 (0,10)

M

0.010 (0,25)

0.050 (1,27)

0°–8°

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-013

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS

SLLS162A – JULY 1993 – REVISED NOVEMBER 1998

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE

20

0.975

(24,77)

0.940

(23,88)

18

0.920

0.850

14

0.775

0.745

(19,69)

(18,92)

16

0.775

(19,69)

(18,92)

0.745

A MIN

DIM

A MAX

PINS **

0.310 (7,87)

0.290 (7,37)

(23.37)

(21.59)

Seating Plane

0.010 (0,25) NOM

14/18 PIN ONL Y

4040049/C 08/95

9

8

0.070 (1,78) MAX

A

0.035 (0,89) MAX

0.020 (0,51) MIN

16

1

0.015 (0,38)

0.021 (0,53)

0.200 (5,08) MAX

0.125 (3,18) MIN

0.240 (6,10)

0.260 (6,60)

M

0.010 (0,25)

0.100 (2,54)

0°–15°

16 PIN SHOWN

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)

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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright  1998, Texas Instruments Incorporated