TEXAS INSTRUMENTS SN65HVD230Q-Q1, SN65HVD231Q-Q1, SN65HVD232Q-Q1 Technical data

查询SN65HVD230QD供应商

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

3.3-V CAN TRANSCEIVERS

FEATURES

D Qualification in Accordance With AEC-Q100

†

D Qualified for Automotive Applications
D Customer-Specific Configuration Control Can

Be Supported Along With Major-Change
Approval

D ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D Operates With a 3.3-V Supply
D Low Power Replacement for the PCA82C250

Footprint

D Bus/Pin ESD Protection Exceeds 15-kV HBM
D Controlled Driver Output Transition Times for

Improved Signal Quality on the SN65HVD230Q
and SN65HVD231Q

D Unpowered Node Does Not Disturb the Bus
D Compatible With the Requirements of the

ISO 11898 Standard

D Low-Current SN65HVD230Q Standby Mode

370 µA Typical

†

Contact factory for details. Q100 qualification data available on
request.

D Low-Current SN65HVD231Q Sleep Mode

0.1 µA Typical

D Designed for Signaling Rates

‡

Up To

1 Megabit/Second (Mbps)

D Thermal Shutdown Protection
D Open-Circuit Fail-Safe Design

SN65HVD230QD
SN65HVD231QD

(TOP VIEW)

GND

V

CC

D

R

1
2
3
4

SN65HVD232QD

(TOP VIEW)

D

1

GND

V

NC – No internal connection

CC

2
3
4

R

R

8
7
6
5

8
7
6
5

S

CANH
CANL
V

ref

NC
CANH
CANL
NC

logic diagram (positive logic)

SN65HVD230Q, SN65HVD231Q
Logic Diagram (Positive Logic)

3

V

CC

1

D

8

R

S

4

R

Please be aware that an important notice concerning availability , standard warranty , and use in critical applications of T exas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.

‡

The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

5

7
6

V

ref

CANH
CANL

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Logic Diagram (Positive Logic)

D

R

SN65HVD232Q

1

7

4

Copyright  2002, Texas Instruments Incorporated

CANH

6

CANL

1

SN65HVD230Q-Q1

125°C

125°C

SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

DESCRIPTION

The SN65HVD230Q, SN65HVD231Q, and SN65HVD232Q controller area network (CAN) transceivers are
designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers, or with
equivalent devices. They are intended for use in applications employing the CAN serial communication physical
layer in accordance with the ISO 11898 standard. Each CAN transceiver is designed to provide differential
transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps.

Designed for operation in especially-harsh environments, these devices feature cross-wire protection,
loss-of-ground and overvoltage protection, overtemperature protection, as well as wide common-mode range.

The transceiver interfaces the single-ended CAN controller with the differential CAN bus found in industrial,
building automation, and automotive applications. It operates over a –2-V to 7-V common-mode range on the
bus, and it can withstand common-mode transients of ±25 V.

On the SN65HVD230Q and SN65HVD231Q, R

(pin 8) provides three different modes of operation:

S

high-speed, slope control, and low-power modes. The high-speed mode of operation is selected by connecting
pin 8 to ground, allowing the transmitter output transistors to switch on and off as fast as possible with no
limitation on the rise and fall slopes. The rise and fall slopes can be adjusted by connecting a resistor to ground
at pin 8, since the slope is proportional to the pin’s output current. This slope control is implemented with external
resistor values of 10 kΩ, to achieve a 15-V/µs slew rate, to 100 kΩ, to achieve a 2-V/µs slew rate.

The circuit of the SN65HVD230Q enters a low-current standby mode during which the driver is switched off and
the receiver remains active if a high logic level is applied to R

(pin 8). The DSP controller reverses this

S

low-current standby mode when a dominant state (bus differential voltage > 900 mV typical) occurs on the bus.
The unique difference between the SN65HVD230Q and the SN65HVD231Q is that both the driver and the

receiver are switched off in the SN65HVD231Q when a high logic level is applied to R
this sleep mode until the circuit is reactivated by a low logic level on R

The V

(pin 5 on the SN65HVD230Q and SN65HVD231Q) is available as a VCC/2 voltage reference.

ref

.

S

(pin 8) and remain in

S

The SN65HVD232Q is a basic CAN transceiver with no added options; pins 5 and 8 are NC, no connection.

AVAILABLE OPTIONS

FUNCTION

NUMBER

’230 370-µA standby mode Yes Yes
’231 10-µA sleep mode Yes Yes
’232 No standby or sleep mode No No

PART NUMBER Q100 T

SN65HVD230QD No
SN65HVD231QD No
SN65HVD232QD No
SN65HVD230QDQ1 Yes
SN65HVD231QDQ1 Yes
SN65HVD232QDQ1 Yes

The D package is available taped and reeled. Add the suffix R to device type (e.g.,
SN65HVD230QDRQ1).

LOW

POWER MODE

INTEGRATED SLOPE

CONTROL

A

–40°C to

°

–40°C to

°

MARKED AS:

Vref PIN

HV230Q
HV231Q
HV232Q
230Q1
231Q1
232Q1

2

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(Rs)

V

(Rs)

1.2 V

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

Function Tables

DRIVER (SN65HVD230Q, SN65HVD231Q)

INPUT D R

L

H

Open X Z Z Recessive

X V

H = high level; L = low level; X = irrelevant; ? = indeterminate

INPUT D

L H L Dominant

H Z Z Recessive

Open Z Z Recessive

H = high level; L = low level

DIFFERENTIAL INPUTS

VID ≥ 0.9 V X L

0.5 V < VID < 0.9 V X ?
VID ≤ 0.5 V X H

Open X H

H = high level; L = low level; X = irrelevant; ? = indeterminate

DIFFERENTIAL INPUTS

VID ≥ 0.9 V L

0.5 V < VID < 0.9 V
VID ≤ 0.5 V

X V
X 1.2 V < V

Open X H

H = high level; L = low level; X = irrelevant; ? = indeterminate

DIFFERENTIAL INPUTS

VID ≥ 0.9 V L

0.5 V < VID < 0.9 V ?
VID ≤ 0.5 V H

H = high level; L = low level; X = irrelevant; ? = indeterminate

S

V

< 1.2 V

(Rs)

> 0.75 V

(Rs)

DRIVER (SN65HVD232Q)

RECEIVER (SN65HVD230Q)

RECEIVER (SN65HVD231Q)

RECEIVER (SN65HVD232Q)

Open H

CC

OUTPUTS

CANH CANL

OUTPUTS

CANH CANL

H L Dominant
Z Z Recessive

Z Z Recessive

BUS STATE

V

(Rs)

R

S

R

S

< 1.2 V

<

> 0.75 V

< 0.75 V

(Rs)

OUTPUT R

CC

CC

OUTPUT R

BUS STATE

OUTPUT R

?
H
H

?

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3

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

TRANSCEIVER MODES (SN65HVD230Q, SN65HVD231Q)

V

10 kΩ to 100 kΩ to ground Slope control

TERMINAL

NAME NO.

CANL 6 Low bus output
CANH 7 High bus output
D 1 Driver input
GND 2 Ground
R 4 Receiver output
R

S

V

CC

V

ref

Function Tables (Continued)

V

(Rs)

> 0.75 V

(RS)

V

(RS)

CC

< 1 V High speed (no slope control)

OPERATING MODE

Standby

Terminal Functions

SN65HVD230Q, SN65HVD231Q

DESCRIPTION

8 Standby/slope control
3 Supply voltage
5 Reference output

SN65HVD232Q

TERMINAL

NAME NO.

CANL 6 Low bus output
CANH 7 High bus output
D 1 Driver input
GND 2 Ground
NC 5, 8 No connection
R 4 Receiver output
V

CC

3 Supply voltage

DESCRIPTION

4

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equivalent input and output schematic diagrams

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

Input

16 V

20 V

CANH and CANL Inputs

110 kΩ

45 kΩ

CANH and CANL Outputs

V

CC

9 kΩ

9 kΩ

16 V

D Input

V

CC

V

CC

100 kΩ

Input

V

CC

1 kΩ

9 V

R Output

20 V

Output

5 Ω

Output

9 V

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5

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

absolute maximum ratings over operating free-air temperature (see Note 1) (unless otherwise
noted)

Supply voltage range, V

Voltage range at any bus terminal (CANH or CANL) –7 V to 16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage input range, transient pulse, CANH and CANL, through 100 Ω (see Figure 7) –25 V to 25 V. . . . . . . . . . . .

Input voltage range, V

Electrostatic discharge: Human body model (see Note 2) CANH, CANL and GND 15 kV. . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.

†

CC

(D or R) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

All pins 2.5 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Charged-device model (see Note 3) All pins 4 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2. Tested in accordance with JEDEC Standard 22, Test Method A114-A.

3. Tested in accordance with JEDEC Standard 22, Test Method C101.

DISSIPATION RATING TABLE

PACKAGE

D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW

‡

This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

‡

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TA = 125°C

POWER RATING

recommended operating conditions

PARAMETER MIN NOM MAX UNIT

Supply voltage, V
Voltage at any bus terminal (common mode) V
Voltage at any bus terminal (separately) V
High-level input voltage, V
Low-level input voltage, V
Differential input voltage, VID (see Figure 5) –6 6 V
V

(RS)

V

for standby or sleep 0.75 V

(RS)

Rs wave-shaping resistance 0 100 kΩ

High-level output current, I

Low-level output current, I
Operating free-air temperature, T

§

The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

CC

IH

IL

OL

OH

IC

I

D, R 2 V
D, R 0.8 V

Driver –40
Receiver –8
Driver 48
Receiver 8

A

3 3.6 V

§

–2

–2.5 7.5 V

0 V

CC

–40 125 °C

CC

V

CC

7 V

V
V

mA

mA

6

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,

V

I

Bus out ut

,

V

I

Differential out ut

t

PLH

Pro agation delay time, low to high level out ut

ns

t

PHL

Pro agation delay time, high to low level out ut

ns
(p)

(HL)

(LH)

t

sk( )

Pulse skew (|t

P(HL)

t

P(LH)

|)

S

4

ns

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

driver electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

V

OH

V

OL

V

OD(D)

V

OD(R)

I

IH

I

IL

I

OS

C

o

I

CC

†

All typical values are at 25°C and with a 3.3-V supply.

Bus output
voltage

Differential output
voltage

High-level input current VI = 2 V –30 µA
Low-level input current VI = 0.8 V –30 µA

Short-circuit output current
Output capacitance See receiver

pp

Supply current

Dominant

Recessive

Dominant

Recessive

Standby SN65HVD230Q
Sleep SN65HVD231Q

All devices

Dominant VI = 0 V, No load Dominant 10 17
Recessive VI = VCC, No load Recessive 10 17

V

= 0 V

= 0 V,

See Figure 1 and Figure 3
V

= 3 V

= 3 V,

See Figure 1 and Figure 3
VI = 0 V, See Figure 1 1.5 2 3

VI = 0 V, See Figure 2 1.2 2 3
VI = 3 V, See Figure 1 –120 0 12 mV
VI = 3 V, No load –0.5 –0.2 0.05 V

V

= –2 V –250 250

CANH

V

= 7 V

CANL

V

= V

(RS)

CC

CANH 2.45 V
CANL 0.5 1.25
CANH 2.3
CANL 2.3

–250 250

370 600

0.1

CC

V

V

mA

µA

mA

driver switching characteristics at TA = 25°C (unless otherwise noted)

SN65HVD230Q and SN65HVD231Q

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

= 0 V 35 85

(RS)

t

PLH

t

PHL

t

sk

t

r

t

f

t

r

t

f

t

r

t

f

Propagation delay time, low-to-high-level output

Propagation delay time, high-to-low-level output

Pulse skew (|t

Differential output signal rise time
Differential output signal fall time
Differential output signal rise time
Differential output signal fall time
Differential output signal rise time
Differential output signal fall time

– t

P

|)

P

RS with 10 kΩ to ground 70 125
RS with 100 kΩ to ground 500 870
V

= 0 V 70 120

(RS)

RS with 10 kΩ to ground
RS with 100 kΩ to ground 870 1200
V

= 0 V 35

(RS)

RS with 10 kΩ to ground
RS with 100 kΩ to ground

V

= 0 V

(RS)

RS with 10 kΩ to ground

RS with 100 kΩ to ground

CL = 50 pF,

ee Figure

ns

130 180

60

370
25 50 100 ns
40 55 80 ns
80 120 160 ns
80 125 150 ns

600 800 1200 ns
600 825 1000 ns

ns

ns

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7

SN65HVD230Q-Q1

C

L

See Figure 4

V

Other in ut at 0 V

See Figure 6

SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

driver switching characteristics at TA = 25°C (unless otherwise noted)

SN65HVD232Q

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

PLH

t

PHL

t

sk(p)

t

r

t

f

receiver electrical characteristics over recommended operating conditions (unless otherwise
noted)

V
V
V

V
V

I

I

C

C
R

R
I

CC

†

All typical values are at 25°C and with a 3.3-V supply.

Propagation delay time, low-to-high-level output 35 85 ns
Propagation delay time, high-to-low-level output 70 120 ns
Pulse skew (|t
Differential output signal rise time
Differential output signal fall time 40 55 80 ns

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

Positive-going input threshold voltage

IT+

Negative-going input threshold voltage

IT–

Hysteresis voltage (V

hys

High-level output voltage

OH

Low-level output voltage 900 mV ≤ VID ≤ 6 V, IO = 8 mA, See Figure 5 0.4

OL

Bus input current

CANH, CANL input capacitance

i

Differential input capacitance

diff

Differential input resistance Pin-to-pin, V

diff
T

CANH, CANL input resistance
Supply current

P(HL)

– t

P(LH)

IT+ – VIT–

|)

See Table 1

) 100

–6 V ≤ VID ≤ 500 mV, IO = –8 mA, See Figure 5

VIH = 7 V 100 250
VIH = 7 V, VCC = 0 V
VIH = –2 V
VIH = –2 V, VCC = 0 V –100 –20
Pin-to-ground,

VI = 0.4 sin(4E6πt) + 0.5 V
Pin-to-pin,

VI = 0.4 sin(4E6πt) + 0.5 V

= 3 V 40 70 100 kΩ

(D)

See driver

CL = 50 pF, See Figure 4

50 F,

Other input at 0 V ,
D = 3 V

V

= 3 V,

(D)

V

= 3 V,

(D)

25 50 100 ns

500 650

2.4

100 350

,

–200 –30

20 35 50 kΩ

35 ns

750 900 mV

32 pF

16 pF

mV

V

µA

µA

receiver switching characteristics at TA = 25°C (unless otherwise noted)

t

PLH

t

PHL

t

sk(p)

t

r

t

f

t

(loop

t

(loop)

t

(loop)

8

PARAMETER

Propagation delay time, low-to-high-level output 35 50 ns
Propagation delay time, high-to-low-level output
Pulse skew (|t
Output signal rise time
Output signal fall time

) Total loop delay, driver input to receiver output V

Total loop delay, driver input to receiver output RS with 10 kΩ to ground 105 175
Total loop delay, driver input to receiver output RS with 100 kΩ to ground 535 920

P(HL)

– t

P(LH)

|)

= 0 V 70 135

(RS)

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TEST

CONDITIONS

See Figure 6

See Figure 6

MIN TYP MAX UNIT

35 50 ns

10 ns

1.5 ns

1.5 ns

ns

t

(WAKE)

See Figure 8

SN65HVD230Q-Q1
SN65HVD231Q-Q1
SN65HVD232Q-Q1

SGLS117C – JUNE 2001 – REVISED JUNE 2002

device control-pin characteristics over recommended operating conditions (unless otherwise
noted)

PARAMETER TEST CONDITIONS MIN TYP

SN65HVD230Q wake-up time from standby mode with
R

t

V

ref

I

(RS)

†

All typical values are at 25°C and with a 3.3 V supply.

S

SN65HVD231Q wake-up time from sleep mode with R

Reference output voltage
Input current for high-speed V

PARAMETER MEASUREMENT INFORMATION

V

CC

I

I

D

I

O

I

O

See Figure 8

S

–5 µA < I
–50 µA < I

(RS)

V

OD

0 V or 3 V

< 5 µA 0.45 V

(Vref)

< 50 µA

(Vref)

< 1 V –450 0 µA

0.4 V

CC

CC

†

MAX UNIT

0.55 1.5 µS
3 µS

0.55 V

CC

0.6 V

CC

60 Ω

CANH

V

V

I

CANL

Figure 1. Driver Voltage and Current Definitions

167 Ω

0 V

Recessive

CANH

CANL

V

OD

Figure 2. Driver V

Dominant

60 Ω

167 Ω

OD

≈ 3 V

≈ 2.3 V

≈ 1 V

±

–2 V ≤ V

V

OH

V

OL

V

OH

TEST

≤ 7 V

CANH

CANL

Figure 3. Driver Output Voltage Definitions

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9