Datasheet SN54HCU04J, SN74HCU04D, SN74HCU04DBR, SN74HCU04DR, SN74HCU04N Datasheet (Texas Instruments)
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SN54HCU04, SN74HCU04
HEX INVERTERS
SCLS079B – MARCH 1984 – REVISED MA Y 1997
D
Unbuffered Outputs
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These devices contain six independent inverters.
They perform the Boolean function Y = A in
positive logic.
The SN54HCU04 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HCU04 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
logic symbol
1
1A
3
2A
5
3A
9
4A
11
5A
13
6A
INPUT
A
H L
L H
†
OUTPUT
Y
1
10
12
SN54HCU04 ...J OR W PACKAGE
SN74HCU04 . . . D OR N PACKAGE
SN54HCU04 . . . FK PACKAGE
2A
NC
2Y
NC
3A
2
1Y
4
2Y
6
3Y
8
4Y
5Y
6Y
NC – No internal connection
(TOP VIEW)
1A
1
1Y
2
2A
3
2Y
4
3A
5
6
3Y
GND
7
(TOP VIEW)
1Y1ANC
3212019
4
5
6
7
8
910111213
3Y
GND
NC
14
13
12
11
10
9
8
V
4Y
CC
V
6A
6Y
5A
5Y
4A
4Y
6A
18
17
16
15
14
4A
CC
6Y
NC
5A
NC
5Y
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
AY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright 1997, Texas Instruments Incorporated
1
SN54HCU04, SN74HCU04
UNIT
HEX INVERTERS
SCLS079B – MARCH 1984 – REVISED MA Y 1997
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
†
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions
SN54HCU04 SN74HCU04
MIN NOM MAX MIN NOM MAX
V
V
V
V
V
t
t
T
Supply voltage 2 5 6 2 5 6 V
CC
VCC = 2 V 1.7 1.7
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 V
I
Output voltage 0 V
O
Input transition (rise and fall) time
Operating free-air temperature –55 125 –40 85 °C
A
VCC = 4.5 V
VCC = 6 V 4.8 4.8
VCC = 2 V 0 0.5 0 0.5
VCC = 4.5 V
VCC = 6 V 0 1.8 0 1.8
VCC = 2 V 0 1000 0 1000
VCC = 4.5 V
VCC = 6 V 0 400 0 400
3.6 3.6
0 1.35 0 1.35
CC
CC
0 500 0 500
0 V
0 V
CC
CC
V
V
V
V
ns
2
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PARAMETER
TEST CONDITIONS
V
UNIT
PARAMETER
V
UNIT
SN54HCU04, SN74HCU04
HEX INVERTERS
SCLS079B – MARCH 1984 – REVISED MA Y 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54HCU04 SN74HCU04
MIN TYP MAX MIN MAX MIN MAX
V
V
V
V
I
I
C
OH
OL
I
CC
i
CC
2 V 1.8 1.8 1.8
IOH = –20 µA
VI = VCC or GND
IOH = –4 mA 4.5 V 3.98 3.7 3.84
IOH = –5.2 mA 6 V 5.48 5.2 5.34
IOL = 20 µA
VI = VCC or GND
IOL = 4 mA 4.5 V 0.26 0.4 0.33
IOL = 5.2 mA 6 V 0.26 0.4 0.33
VI = VCC or 0 6 V ±100 ±1000 ±1000 nA
VI = VCC or 0, IO = 0 6 V 2 40 20 µA
4.5 V 4 4 4
6 V 5.5 5.5 5.5
2 V 0.2 0.2 0.2
4.5 V 0.5 0.5 0.5
6 V 0.5 0.5 0.5
2 V to 6 V 3 10 10 10 pF
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
FROM TO
(INPUT) (OUTPUT)
t
pd
t
f
A Y
Y
CC
2 V 40 80 120 100
4.5 V 8 16 24 20
6 V 7 14 20 17
2 V 38 75 110 95
4.5 V 8 15 22 19
6 V 6 13 19 16
TA = 25°C SN54HCU04 SN74HCU04
MIN TYP MAX MIN MAX MIN MAX
ns
ns
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
Power dissipation capacitance per inverter No load 20 pF
pd
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3
SN54HCU04, SN74HCU04
HEX INVERTERS
SCLS079B – MARCH 1984 – REVISED MA Y 1997
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
LOAD CIRCUIT
Input
NOTES: A. CL includes probe and test-fixture capacitance.
90% 90%
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. t
PLH
and t
PHL
Test
Point
CL = 50 pF
(see Note A)
50%50%
are the same as tpd.
V
CC
10%10%
0 V
t
f
Input
In-Phase
Output
Out-of-Phase
Output
†
tr is not applicable to ’HCU devices.
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
t
PLH
t
PHL
VOLTAGE WAVEFORMS
50%
t
PHL
90% 90%
†
t
r
t
PLH
50% 50%
10% 10%
t
f
V
CC
0 V
V
50%50%
OH
10%10%
V
OL
t
f
V
OH
90%90%
V
OL
†
t
r
Figure 1. Load Circuit and Voltage Waveforms
4
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