The ’HCT32 devices contain four independent 2-input OR gates. They perform the Boolean function
Y+A
• B or Y+A)B
in positive logic.
ORDERING INFORMA TION
T
A
PDIP – NTube of 25SN74HCT32NSN74HCT32N
SOP – NSReel of 2000SN74HCT32NSRHCT32
SSOP – DBReel of 2000SN74HCT32DBRHT32
CDIP – JTube of 25SNJ54HCT32JSNJ54HCT32J
CFP – WT ube of 150SNJ54HCT32WSNJ54HCT32W
LCCC – FKTube of 55SNJ54HCT32FKSNJ54HCT32FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
PACKAGE
†
Tube of 50SN74HCT32D
Reel of 2500SN74HCT32DR
Reel of 250SN74HCT32DT
Tube of 90SN74HCT32PW
Reel of 2000SN74HCT32PWR
Reel of 250SN74HCT32PWT
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1
SN54HCT32, SN74HCT32
OUTPUT
OUTPUT
UNIT
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCLS064E – NOVEMBER 1988 – REVISED AUGUST 2003
FUNCTION TABLE
INPUTS
AB
HXH
XHH
LLL
logic diagram (positive logic)
(each gate)
Y
A
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
V
V
V
V
V
∆t/∆vInput transition rise/fall time500500ns
T
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage4.555.54.555.5V
CC
High-level input voltageVCC = 4.5 V to 5.5 V22V
IH
Low-level input voltageVCC = 4.5 V to 5.5 V0.80.8V
IL
Input voltage0V
I
Output voltage0V
O
Operating free-air temperature–55125–4085°C
A
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
CC
0V
0V
CC
CC
V
V
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
V
CC
UNIT
V
OH
VI = VIH or V
IL
4.5 V
V
V
OL
VI = VIH or V
IL
4.5 V
V
FROM
TO
PARAMETER
FROM
TO
V
CC
UNIT
tpdA or B
Y
ns
ttY
ns
SN54HCT32, SN74HCT32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCLS064E – NOVEMBER 1988 – REVISED AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°CSN54HCT32SN74HCT32
MINTYPMAXMINMAXMINMAX
IOH = –20 µA
IOH = –4 mA
IOL = 20 µA
IOL = 4 mA
I
I
I
CC
∆I
CC
C
i
†
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.
VI = VCC or 05.5 V±0.1±100±1000±1000nA
VI = VCC or 0,IO = 05.5 V24020µA
One input at 0.5 V or 2.4 V,
†
Other inputs at 0 or V
CC
5.5 V1.42.432.9mA
4.5 V
to 5.5 V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
(INPUT)
(OUTPUT)
4.5 V15243530
5.5 V13223227
4.5 V9152219
5.5 V8142017
4.4 4.4994.44.4
3.984.33.73.84
0.0010.10.10.1
0.170.260.40.33
3101010pF
TA = 25°CSN54HCT32SN74HCT32
MINTYPMAXMINMAXMINMAX
operating characteristics, TA = 25°C
PARAMETERTEST CONDITIONSTYPUNIT
C
Power dissipation capacitance per gateNo load20pF
pd
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54HCT32, SN74HCT32
3 V
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCLS064E – NOVEMBER 1988 – REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
LOAD CIRCUIT
Input
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
C. The outputs are measured one at a time with one input transition per measurement.
D. t
2.7 V2.7 V
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.