TEXAS INSTRUMENTS SN54HC86, SN74HC86 Technical data

SOIC – D

HC86

–40°C to 85°C

TSSOP – PW

HC86

–55°C to 125°C

Wide Operating Voltage Range of 2 V to 6 V

Outputs Can Drive Up To 10 LSTTL Loads

Low Power Consumption, 20-µA Max I

Typical t

SN74HC86 . . . D, N, NS, OR PW PACKAGE

= 10 ns

SN54HC86 ...J OR W PACKAGE

(TOP VIEW)

1A 1B 1Y 2A 2B 2Y

GND

1 2 3 4 5 6 7

14 13 12 11 10

4B 4A 4Y 3B

SN54HC86, SN74HC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003

±4-mA Output Drive at 5 V

Low Input Current of 1 µA Max

True Logic

SN54HC86 . . . FK PACKAGE

NC – No internal connection

(TOP VIEW)

1B1ANC

3212019

4 5 6 7 8

910111213

GND

18 17 16 15 14

4A NC 4Y NC 3B

description/ordering information

These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ę B or Y = A

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

B + AB in positive logic.

PDIP – N Tube of 25 SN74HC86N SN74HC86N

SOP – NS Reel of 2000 SN74HC86NSR HC86

CDIP – J Tube of 25 SNJ54HC86J SNJ54HC86J CFP – W T ube of 150 SNJ54HC86W SNJ54HC86W LCCC – FK Tube of 55 SNJ54HC86FK SNJ54HC86FK

ORDERING INFORMATION

PACKAGE

†

Tube of 50 SN74HC86D Reel of 2500 SN74HC86DR Reel of 250 SN74HC86DT

Tube of 90 SN74HC86PW Reel of 2000 SN74HC86PWR Reel of 250 SN74HC86PWT

ORDERABLE

PART NUMBER

TOP-SIDE MARKING

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN54HC86, SN74HC86

OUTPUT

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003

FUNCTION TABLE

(each gate)

INPUTS

A B

L L L L HH H LH

H H L

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.

Exclusive OR

= 1

These are five equivalent exclusive-OR symbols valid for an ’HC86 gate in positive logic; negation may be shown at any two ports.

Logic Identity Element Even-Parity Element Odd-Parity Element

= 2k 2k + 1

The output is active (low) if all inputs stand at the same logic level (i.e., A = B).

The output is active (low) if an even number of inputs (i.e., 0 or 2) are active.

The output is active (high) if an odd number of inputs (i.e., only 1 of the 2) are active.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54HC86, SN74HC86

UNIT

VIHHigh-level input voltage

VILLow-level input voltage

Input transition rise/fall time

PARAMETER

TEST CONDITIONS

UNIT

IOH = –20 µA

VI = VIH or V

IIH IL

IOL = 20 µA

VI = VIH or V

IIH IL

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003

recommended operating conditions (see Note 3)

SN54HC86 SN74HC86

MIN NOM MAX MIN NOM MAX

V V

∆t/∆

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 2 5 6 2 5 6 V

VCC = 2 V 1.5 1.5 VCC = 4.5 V 3.15 3.15 VCC = 6 V 4.2 4.2 VCC = 2 V 0.5 0.5 VCC = 4.5 V 1.35 1.35 VCC = 6 V 1.8 1.8

Input voltage 0 V

Output voltage 0 V

VCC = 2 V 1000 1000 VCC = 4.5 V 500 500 VCC = 6 V 400 400

Operating free-air temperature –55 125 –40 85 °C

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

CC CC

0 V 0 V

CC CC

V V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

TA = 25°C SN54HC86 SN74HC86

MIN TYP MAX MIN MAX MIN MAX

2 V 1.9 1.998 1.9 1.9

4.5 V 4.4 4.499 4.4 4.4 6 V 5.9 5.999 5.9 5.9

IOH = –4 mA 4.5 V 3.98 4.3 3.7 3.84 IOH = –5.2 mA 6 V 5.48 5.8 5.2 5.34

2 V 0.002 0.1 0.1 0.1

4.5 V 0.001 0.1 0.1 0.1 6 V 0.001 0.1 0.1 0.1

IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33

IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33 I I C

I CC

VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA VI = VCC or 0, IO = 0 6 V 2 40 20 µA

2 V to 6 V 3 10 10 10 pF

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54HC86, SN74HC86

FROM

PARAMETER

FROM

UNIT

tpdA or B

ttY

PLH

PHL

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003

switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)

TA = 25°C SN54HC86 SN74HC86

(INPUT)

operating characteristics, TA = 25°C

Power dissipation capacitance per gate No load 35 pF

PARAMETER MEASUREMENT INFORMATION

(OUTPUT)

2 V 40 100 150 125

4.5 V 12 20 30 25 6 V 10 17 25 21 2 V 28 75 110 95

4.5 V 8 15 22 19 6 V 6 13 19 16

PARAMETER TEST CONDITIONS TYP UNIT

MIN TYP MAX MIN MAX MIN MAX

From Output

Under Test

LOAD CIRCUIT

Input

NOTES: A. CL includes probe and test-fixture capacitance.

90% 90%

VOLTAGE WAVEFORM

INPUT RISE AND FALL TIMES

B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. t

and t

Test Point

CL = 50 pF (see Note A)

50%50%

are the same as tpd.

10%10%

0 V

Figure 1. Load Circuit and Voltage Waveforms

Input

In-Phase

Output

Out-of-Phase

Output

50%

PLH

90% 90%

PHL

50% 50%

10% 10%

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

VOLTAGE WAVEFORMS

50%

PHL

50%50%

PLH

0 V

10%10%

90%90%

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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