Texas Instruments SN54HC4060FK, SN74HC4060D, SN74HC4060DR, SN74HC4060N Datasheet
SN54HC4060, SN74HC4060
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS161B – DECEMBER 1982 – REVISED MA Y 1997
D
Allow Design of Either RC or Crystal
Oscillator Circuits
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
The ’HC4060 consist of an oscillator section and
14 ripple-carry binary counter stages. The
oscillator configuration allows design of either RC
or crystal-oscillator circuits. A high-to-low
transition on the clock (CLKI) input increments the
counter. A high level at the clear (CLR) input
disables the oscillator (CLKO
CLKO goes low) and resets the counter to zero (all
Q outputs low).
The SN54HC4060 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC4060 is characterized for
operation from –40°C to 85°C.
12
11
†
RCTR14
1 +
CT
CT=0
&
logic symbol
CLR
CLKI
goes high and
3
9
11
13
Z1
14
13
15
10
SN54HC4060 . . . J OR W PACKAGE
SN74HC4060 ...D OR N PACKAGE
SN54HC4060 . . . FK PACKAGE
Q
N
Q
F
NC
Q
E
Q
G
7
Q
D
5
Q
E
4
Q
F
6
Q
G
Q
H
Q
I
Q
J
1
Q
L
2
Q
M
3
Q
N
CLKO
9
CLKO
NC – No internal connection
(TOP VIEW)
Q
1
L
Q
2
M
Q
3
N
Q
4
F
5
Q
E
6
Q
G
7
Q
D
GND
8
(TOP VIEW)
M
QQNC
3212019
4
5
6
7
8
910111213
D
Q
L
GND
NC
16
15
14
13
12
11
10
9
CC
V
CLKO
V
CC
Q
J
Q
H
Q
I
CLR
CLKI
CLKO
CLKO
J
Q
18
17
16
15
14
CLKO
Q
H
Q
I
NC
CLR
CLKI
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC4060, SN74HC4060
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS161B – DECEMBER 1982 – REVISED MA Y 1997
logic diagram (positive logic)
R
T
12
CLR
11
CLKI
Pin numbers shown are for the D, J, N, and W packages.
R
T
4
Q
F
R
T
6141315 1 2 3
Q
G
10
Q
H
9
CLKO
CLKO
R
T
R
T
Q
I
R
T
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
R
T
Q
J
R
T
R
T
R
T
R
T
Q
L
R
T
R
T
Q
M
R
T
75
Q
D
†
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Q
N
Q
E
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
PARAMETER
TEST CONDITIONS
V
UNIT
Q outputs
V
V
V
Q outputs
V
V
or V
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
recommended operating conditions
V
V
V
V
V
t
t
T
Supply voltage 2 5 6 2 5 6 V
CC
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 V
I
Output voltage 0 V
O
Input transition (rise and fall) time
Operating free-air temperature –55 125 –40 85 °C
A
SN54HC4060, SN74HC4060
SCLS161B – DECEMBER 1982 – REVISED MA Y 1997
SN54HC4060 SN74HC4060
MIN NOM MAX MIN NOM MAX
VCC = 2 V 1.5 1.5
VCC = 4.5 V
VCC = 6 V 4.2 4.2
VCC = 2 V 0 0.5 0 0.5
VCC = 4.5 V
VCC = 6 V 0 1.8 0 1.8
VCC = 2 V 0 1000 0 1000
VCC = 4.5 V
VCC = 6 V 0 400 0 400
3.15 3.15
0 1.35 0 1.35
CC
CC
0 500 0 500
0 V
0 V
CC
CC
V
V
V
V
ns
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54HC4060 SN74HC4060
MIN TYP MAX MIN MAX MIN MAX
V
V
All outputs VI = VIH or V
V
OH
p
All outputs VI = VIH or V
V
OL
p
I
I
I
CC
C
i
CC
2 V 1.9 1.998 1.9 1.9
ILIOH
=
or
I
IH
IL
ILIOL
=
I
IH
IL
VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
VI = VCC or 0, IO = 0 6 V 8 160 80 µA
= –20 µA
IOH = –4 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = –5.2 mA 6 V 5.48 5.8 5.2 5.34
= 20 µA
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33
4.5 V 4.4 4.499 4.4 4.4
6 V 5.9 5.999 5.9 5.9
2 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1
2 V to 6 V 3 10 10 10 pF
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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