SN54HC393, SN74HC393
DUAL 4-BIT BINARY COUNTERS
SCLS143B – DECEMBER 1982 – REVISED MA Y 1997
D
Dual 4-Bit Binary Counters With Individual
Clocks
D
Direct Clear for Each 4-Bit Counter
D
Can Significantly Improve System
Densities by Reducing Counter Package
Count by 50 Percent
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Ceramic Flat (W) Packages,
Ceramic Chip Carriers (FK), and Standard
Plastic (N) and Ceramic (J) 300-mil DIPs
description
The ’HC393 contain eight flip-flops and additional
gating to implement two individual 4-bit counters
in a single package. The ’HC393 comprise two
independent 4-bit binary counters, each having a
clear (CLR) and a clock (CLK) input. N-bit binary
counters can be implemented with each package,
providing the capability of divide by 256. The
’HC393 have parallel outputs from each counter
stage so that any submultiple of the input count
frequency is available for system timing signals.
The SN54HC393 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC393 is characterized for
operation from –40°C to 85°C.
SN54HC393 ...J OR W PACKAGE
SN74HC393 . . . D, DB, OR N PACKAGE
SN54HC393 . . . FK PACKAGE
1Q
NC
1Q
NC
1Q
NC – No internal connection
(TOP VIEW)
1CLK
1CLR
1Q
A
1Q
B
1Q
C
1Q
D
GND
3212019
4
A
5
6
B
7
8
C
910111213
1
14
2
13
3
12
4
11
5
10
6
7
(TOP VIEW)
1CLR
1CLKNCV
D
NC
1Q
GND
9
8
CC
D2QC
V
CC
2CLK
2CLR
2Q
2Q
2Q
2Q
2CLK
18
17
16
15
14
2Q
A
B
C
D
2CLR
NC
2Q
A
NC
2Q
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC393, SN74HC393
DUAL 4-BIT BINARY COUNTERS
SCLS143B – DECEMBER 1982 – REVISED MA Y 1997
logic symbol
FUNCTION TABLE COUNT SEQUENCE
0 L L L L
1 L LLH
2 L LHL
3 L LHH
4 L HLL
5 L HLH
6 L HHL
7 L HHH
8 H LLL
9 H LLH
10 H LHL
11 H LHH
12 H HLL
13 H HLH
14 H HHL
15 H H H H
(each counter)
OUTPUTS
Q
Q
D
C
Q
Q
B
A
†
CTRDIV16
1CLR
1CLK
2CLR
2CLK
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, and W packages.
2
1
12
13
CT=0
+
0
CT
3
11
10
3
1Q
A
4
1Q
B
5
1Q
C
6
1Q
D
2Q
A
2Q
B
9
2Q
C
8
2Q
D
2
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logic diagram, each counter (positive logic)
SN54HC393, SN74HC393
DUAL 4-BIT BINARY COUNTERS
SCLS143B – DECEMBER 1982 – REVISED MA Y 1997
CLR
CLK
absolute maximum ratings over operating free-air temperature range
R
Q
A
T
R
Q
B
T
R
Q
C
T
R
Q
D
T
†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
(VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DB package 158°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
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3