Texas Instruments JM38510-65706BEA, SN54HC365J, SN74HC365D, SN74HC365DR, SN74HC365N Datasheet

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SN54HC365, SN74HC365
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
D
D
True Outputs
D
Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
description
These hex buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC365 contain six independent buffers/drivers with dual-gated output-enable (OE1
and OE2) inputs. When OE1 and OE2 are both low, the device passes noninverted data from the A inputs to the Y outputs. If either (or both) output-enable terminal(s) is high, the outputs are in the high-impedance state.
The SN54HC365 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74HC365 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE1 OE2 A
H X X Z X HX Z
L LH H L L L L
OUTPUT
Y
SN54HC365 ...J OR W PACKAGE SN74HC365 . . . D OR N PACKAGE
SN54HC365 . . . FK PACKAGE
Y1 A2
NC
Y2 A3
NC – No internal connection
(TOP VIEW)
OE1
1
A1
2
Y1
3
A2
4 5
Y2
6
A3
7
Y3
GND
8
(TOP VIEW)
A1
3212019
4 5 6 7 8
910111213
Y3
OE1
GND
NC
NC
16 15 14 13 12 11 10
9
V
Y4
CC
V
CC
OE2 A6 Y6 A5 Y5 A4 Y4
OE2
18 17 16 15 14
A4
A6 Y6 NC A5 Y5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
OE1 OE2
A1 A2 A3
A4 A5 A6
1 15
2 4 6
10 12 14
&
EN
logic diagram (positive logic)
OE1 OE2
1 15
23
A1
Y1
11 13
3
Y1
5
Y2
7
Y3
9
Y4 Y5 Y6
To Five Other Channels
Pin numbers shown are for the D, J, N, and W packages.
absolute maximum ratings over operating free-air temperature range
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
(VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
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UNIT
PARAMETER
TEST CONDITIONS
V
UNIT
recommended operating conditions
V
V
V
V V
t
t
T
Supply voltage 2 5 6 2 5 6 V
CC
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 V
I
Output voltage 0 V
O
Input transition (rise and fall) time
Operating free-air temperature –55 125 –40 85 °C
A
SN54HC365, SN74HC365
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
SN54HC365 SN74HC365
MIN NOM MAX MIN NOM MAX
VCC = 2 V 1.5 1.5 VCC = 4.5 V VCC = 6 V 4.2 4.2 VCC = 2 V 0 0.5 0 0.5 VCC = 4.5 V VCC = 6 V 0 1.8 0 1.8
VCC = 2 V 0 1000 0 1000 VCC = 4.5 V VCC = 6 V 0 400 0 400
3.15 3.15
0 1.35 0 1.35
CC CC
0 500 0 500
0 V 0 V
CC CC
V
V
V V
ns
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C SN54HC365 SN74HC365
MIN TYP MAX MIN MAX MIN MAX
V
V
V
V
I I I C
OH
OL
I OZ CC
i
CC
2 V 1.9 1.998 1.9 1.9
IOH = –20 µA
VI = VIH or V
VI = VIH or V
VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5 µA VI = VCC or 0, IO = 0 6 V 8 160 80 µA
IL
IOH = –6 mA 4.5 V 3.98 4.3 3.7 3.84 IOH = –7.8 mA 6 V 5.48 5.8 5.2 5.34
IOL = 20 µA
IL
IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33 IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33
4.5 V 4.4 4.499 4.4 4.4 6 V 5.9 5.999 5.9 5.9
2 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1 6 V 0.001 0.1 0.1 0.1
2 V to 6 V 3 10 10 10 pF
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
SN54HC365, SN74HC365
PARAMETER
V
UNIT
PARAMETER
V
UNIT
HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM TO
(INPUT) (OUTPUT)
t
pd
t
en
t
dis
t
t
A Y
OE Y
OE Y
Any
CC
2 V 50 95 145 120
4.5 V 12 19 29 24 6 V 10 16 25 20 2 V 100 190 285 238
4.5 V 26 38 57 48 6 V 21 32 48 41 2 V 50 175 265 240
4.5 V 21 35 53 48 6 V 19 30 45 41 2 V 28 60 90 75
4.5 V 8 12 18 15 6 V 6 10 15 13
switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1)
FROM TO
(INPUT) (OUTPUT)
t
pd
t
en
t
t
A Y
OE Y
Any
CC
2 V 70 120 180 150
4.5 V 17 24 36 30 6 V 14 20 31 25 2 V 140 230 345 285
4.5 V 30 46 69 57 6 V 28 39 59 48 2 V 45 210 315 265
4.5 V 17 42 63 53 6 V 13 36 53 45
TA = 25°C SN54HC365 SN74HC365
MIN TYP MAX MIN MAX MIN MAX
ns
ns
ns
ns
TA = 25°C SN54HC365 SN74HC365
MIN TYP MAX MIN MAX MIN MAX
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
4
Power dissipation capacitance per buffer/driver No load 35 pF
pd
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50%
S1
S2
t
PHL
t
PLH
50%50%
10%10%
Test
From Output
Under Test
(see Note A)
Input
In-Phase
Output
Out-of-Phase
Output
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Input
50%
INPUT RISE AND FALL TIMES
Point
C
L
LOAD CIRCUIT
t
PLH
t
PHL
VOLTAGE WAVEFORMS
90% 90%
t
r
VOLTAGE WAVEFORM
R
L
90% 90%
t
r
50% 50%
10% 10%
t
f
SN54HC365, SN74HC365
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
V
CC
t
f
V
0 V
50%50%
CC
PARAMETER C
t
Output
Control
Output
Output
t
t
t
PZH
t
PZL
t
PHZ
t
PLZ
PZL
PZH
t
en
t
dis
tpd or t
V
CC
0 V
V
OH
10%10%
V
OL
t
f
V
90%90%
V
t
r
(Low-Level
OH
OL
Enabling)
Waveform 1
(See Note B)
Waveform 2
(See Note B)
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
R
L
1 k
1 k
50%
VOLTAGE WAVEFORMS
L
50 pF
or
150 pF
50 pF
50 pF
or
150 pF
V
50%
50%
CC
S1
Open Closed
Closed Open
Open Closed
Closed Open
Open Open––
50%
t
PLZ
10%
90%
t
PHZ
S2
V
CC
0 V
V
V
OL
V
OH
0 V
CC
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. t
F. t
G. t
PLH PLZ PZL
and t and t and t
are the same as tpd.
PHL
are the same as t
PHZ
are the same as ten.
PZH
dis
.
Figure 1. Load Circuit and Voltage Waveforms
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5
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Copyright 1998, Texas Instruments Incorporated
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