TEXAS INSTRUMENTS SN54HC245, SN74HC245 Technical data
SOIC – DW
HC245
–40°C to 85°C
TSSOP – PW
HC245
–55°C to 125°C
f
SN54HC245, SN74HC245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS131D – DECEMBER 1982 – REVISED AUGUST 2003
D
Wide Operating Voltage Range of 2 V to 6 V
D
High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
D
Low Power Consumption, 80-µA Max I
SN54HC245 ...J OR W PACKAGE
SN74HC245 . . . DB, DW, N, NS, OR PW PACKAGE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
(TOP VIEW)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
CC
CC
D
Typical t
D
±6-mA Output Drive at 5 V
D
Low Input Current of 1 µA Max
= 12 ns
pd
SN54HC245 ...FK PACKAGE
A3
A4
A5
A6
A7
(TOP VIEW)
B8
V
B7
A2A1DIR
3212019
4
5
6
7
8
910111213
A8
CC
OE
18
17
16
15
14
B6
GND
B1
B2
B3
B4
B5
description/ordering information
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The
control-function implementation minimizes external timing requirements.
The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the
device so that the buses are effectively isolated.
ORDERING INFORMA TION
T
A
PDIP – N Tube of 20 SN74HC245N SN74HC245N
°
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
SOP – NS Reel of 2000 SN74HC245NSR HC245
°
SSOP – DB Reel of 2000 SN74HC245DBR HC245
CDIP – J Tube of 20 SNJ54HC245J SNJ54HC245J
CFP – W T ube of 85 SNJ54HC245W SNJ54HC245W
LCCC – FK Tube of 55 SNJ54HC245FK SNJ54HC245FK
PACKAGE
†
Tube of 25 SN74HC245DW
Reel of 2000 SN74HC245DWR
Tube of 70 SN74HC245PW
Reel of 2000 SN74HC245PWR
Reel of 250 SN74HC245PWT
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
SN54HC245, SN74HC245
OPERATION
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS131D – DECEMBER 1982 – REVISED AUGUST 2003
logic diagram (positive logic)
1
DIR
2
A1
FUNCTION TABLE
INPUTS
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation
19
18
OE
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
(VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
(VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
(VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
VIHHigh-level input voltage
V
IH
VILLow-level input voltage
V
IL
v
Input transition rise/fall time
ns
PARAMETER
TEST CONDITIONS
V
CC
UNIT
IOH = –20 µA
VOHVI = VIH or V
IL
OH
V
OH
IIH IL
IOL = 20 µA
VOLVI = VIH or V
IL
OL
V
OL
IIH IL
SN54HC245, SN74HC245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS131D – DECEMBER 1982 – REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HC245 SN74HC245
MIN NOM MAX MIN NOM MAX
V
V
V
∆t/∆
T
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 2 5 6 2 5 6 V
CC
VCC = 2 V 1.5 1.5
VCC = 4.5 V 3.15 3.15
VCC = 6 V 4.2 4.2
VCC = 2 V 0.5 0.5
VCC = 4.5 V 1.35 1.35
VCC = 6 V 1.8 1.8
Input voltage 0 V
I
Output voltage 0 V
O
VCC = 2 V 1000 1000
VCC = 4.5 V 500 500
VCC = 6 V 400 400
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
CC
0 V
0 V
CC
CC
V
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54HC245 SN74HC245
MIN TYP MAX MIN MAX MIN MAX
2 V 1.9 1.998 1.9 1.9
4.5 V 4.4 4.499 4.4 4.4
6 V 5.9 5.999 5.9 5.9
IOH = –6 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = –7.8 mA 6 V 5.48 5.8 5.2 5.34
2 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1
IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33
I
DIR or OE VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
I
I
A or B VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5 µA
OZ
I
CC
C
DIR or OE 2 V to 6 V 3 10 10 10 pF
i
VI = VCC or 0, IO = 0 6 V 8 160 80 µA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54HC245, SN74HC245
FROM
TO
PARAMETER
FROM
TO
V
CC
UNIT
tpdA or B
B or A
ns
pd
tenOE
A or B
ns
en
t
dis
OE
A or B
ns
dis
ttA or B
ns
t
FROM
TO
PARAMETER
FROM
TO
V
CC
UNIT
tpdA or B
B or A
ns
pd
tenOE
A or B
ns
en
ttA or B
ns
t
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS131D – DECEMBER 1982 – REVISED AUGUST 2003
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
TA = 25°C SN54HC245 SN74HC245
(INPUT)
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
(INPUT)
(OUTPUT)
(OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
2 V 40 105 160 130
4.5 V 15 21 32 26
6 V 12 18 27 22
2 V 125 230 340 290
4.5 V 23 46 68 58
6 V 20 39 58 49
2 V 74 200 300 250
4.5 V 25 40 60 50
6 V 21 34 51 43
2 V 20 60 90 75
4.5 V 8 12 18 15
6 V 6 10 15 13
TA = 25°C SN54HC245 SN74HC245
MIN TYP MAX MIN MAX MIN MAX
2 V 54 135 200 170
4.5 V 18 27 40 34
6 V 15 23 34 29
2 V 150 270 405 335
4.5 V 31 54 81 67
6 V 25 46 69 56
2 V 45 210 315 265
4.5 V 17 42 63 53
6 V 13 36 53 45
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
4
Power dissipation capacitance per transceiver No load 40 pF
pd
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
SN54HC245, SN74HC245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS131D – DECEMBER 1982 – REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
50%
t
PHL
t
PLH
S1
S2
50%50%
10%10%
Test
From Output
Under Test
(see Note A)
Input
In-Phase
Output
Out-of-Phase
Output
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Input
50%
INPUT RISE AND FALL TIMES
Point
C
L
LOAD CIRCUIT
t
PLH
t
PHL
VOLTAGE WAVEFORMS
90% 90%
t
r
VOLTAGE WAVEFORM
R
L
90% 90%
t
r
50% 50%
10% 10%
t
f
CC
t
f
V
0 V
50%50%
CC
t
PLZ
10%
t
PHZ
90%
S2
V
CC
0 V
≈V
V
OL
V
OH
≈0 V
CC
PARAMETER C
t
Output
Control
Output
Output
t
t
t
PZH
t
PZL
t
PHZ
t
PLZ
PZL
PZH
t
en
t
dis
tpd or t
V
CC
0 V
V
OH
10%10%
V
OL
t
f
V
90%90%
V
t
r
(Low-Level
OH
OL
Enabling)
Waveform 1
(See Note B)
Waveform 2
(See Note B)
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
R
L
1 kΩ
1 kΩ
50%
VOLTAGE WAVEFORMS
L
50 pF
or
150 pF
50 pF
50 pF
or
150 pF
≈V
50%
50%
CC
S1
Open Closed
Closed Open
Open Closed
Closed Open
Open Open––
50%
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. t
F. t
G. t
PLZ
PZL
PLH
and t
and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PHL
dis
.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
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