Texas Instruments SN54HC148J, SN74HC148DR, SN74HC148DW, SN74HC148DWR, SN74HC148N Datasheet
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SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MA Y 1997
D
Encode Eight Data Lines to 3-Line Binary
(Octal)
D
Applications Include:
– n-Bit Encoding
– Code Converters and Generators
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
The ’HC148 feature priority decoding of the inputs
to ensure that only the highest-order data line is
encoded. These devices encode eight data lines
to 3-line (4-2-1) binary (octal). Cascading circuitry
(enable input EI and enable output EO) has been
provided to allow octal expansion without the
need for external circuitry . Data inputs and outputs
are active at the low logic level.
The SN54HC148 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC148 is characterized for
operation from –40°C to 85°C.
SN54HC148 ...J OR W PACKAGE
SN74HC148 . . . D OR N PACKAGE
SN54HC148 . . . FK PACKAGE
6
7
NC
EI
A2
NC – No internal connection
(TOP VIEW)
4
1
5
2
6
3
7
4
5
EI
6
A2
7
A1
GND
8
(TOP VIEW)
54NC
3212019
4
5
6
7
8
910111213
A1
GND
NC
16
15
14
13
12
11
10
9
CC
V
A0
V
EO
GS
3
2
1
0
A0
EO
18
17
16
15
14
0
CC
GS
3
NC
2
1
FUNCTION TABLE
INPUTS
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
H X X X X X X X X H H H H H
L H HHHHHHHHHHHL
L X XXXXXXLLLLLH
L X XXXXXLHLLHLH
L X XXXXLHHLHLLH
L X XXXLHHHLHHLH
L X XXLHHHHHLLLH
L X XLHHHHHHLHLH
L X LHHHHHHHHLLH
L L H H H H H H H H H H L H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUTS
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
†
a
HPRI/BIN
10
11
12
13
14
15
16
17
≥1
10
0
11
1
12
2
13
3
1
4
2
5
3
6
4
7
5
EI
0/Z10
1/Z11
2/Z12
3/Z13
4/Z14
5/Z15
6/Z16
7/Z17
V18
EN
18
1
2
4
15
EO
a
a
a
a
14
GS
9
A0
7
A1
6
A2
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
10
0
11
1
12
2
13
3
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MA Y 1997
15
EO
14
GS
9
A0
1
4
7
A1
2
5
3
6
4
7
5
EI
6
A2
Pin numbers shown are for the D, J, N, and W packages.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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