TEXAS INSTRUMENTS SN54F86, SN74F86 Technical data

SN54F86, SN74F86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SDFS019B – JANUARY 1989 – REVISED JANUARY 1997

D

Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs

description

These devices contain four independent 2-input
exclusive-OR gates. They perform the Boolean
function Y = A ⊕ B or Y = A

A common application is as a true/complement
element. If one of the inputs is low, the other input
is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is
reproduced inverted at the output.

The SN54F86 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F86 is characterized for
operation from 0°C to 70°C.

FUNCTION TABLE
(each gate)

INPUTS

A B

L L L

L HH
HLH
HHL

B + AB in positive logic.

OUTPUT

Y

SN54F86 ...J PACKAGE

SN74F86 ...D OR N PACKAGE

1Y

NC

2A

NC

2B

NC – No internal connection

(TOP VIEW)

1A

1

1B

2

1Y

3

2A

4

2B

5

2Y

6

GND

7

SN54F86 . . . FK PACKAGE

(TOP VIEW)

1B1ANC

3212019

4
5
6
7
8

910111213

2Y

GND

14
13
12
11
10

NC

V

CC

4B
4A
4Y
3B
3A

9

3Y

8

CC

V

4B

18
17
16
15
14

3Y

3A

4A
NC
4Y
NC
3B

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

†

1

1A

2

1B

4

2A

5

2B

9

3A

10

3B

12

4A

13

4B

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

= 1

3

1Y

6

2Y

8

3Y

11

4Y

Copyright  1997, Texas Instruments Incorporated

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

SN54F86, SN74F86

UNIT

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SDFS019B – JANUARY 1989 – REVISED JANUARY 1997

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.

EXCLUSIVE OR

= 1

These are five equivalent exclusive-OR symbols valid for an ’F86 gate in positive logic; negation may be shown at any two ports.

LOGIC-IDENTITY ELEMENT EVEN-PARITY ELEMENT ODD-PARITY ELEMENT

= 2k 2k + 1

The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).

The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.

The output is active (high) if
an odd number of outputs
(i.e., only 1 of the 2) are
active.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Input voltage range, V

Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high state –0.5 V to V

Current into any output in the low state 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ
Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input voltage ratings may be exceeded provided the input current ratings are observed.

2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

recommended operating conditions

SN54F86 SN74F86

MIN NOM MAX MIN NOM MAX

V
V
V
I
I
I
T

CC
IH

IL
IK
OH
OL

A

Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
Input clamp current –18 –18 mA
High-level output current –1 –1 mA
Low-level output current 20 20 mA
Operating free-air temperature –55 125 0 70 °C

†

CC

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

UNIT

V

V

(

)

(

)

(INPUT)

(OUTPUT)

Y

ns

Y

ns

SN54F86, SN74F86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SDFS019B – JANUARY 1989 – REVISED JANUARY 1997

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54F86 SN74F86

MIN TYP†MAX MIN TYP†MAX

V

IK

OH

V

OL

I

I

I

IH

I

IL

‡

I

OS

I

CCH

I

†
‡

NOTE 3: I

CCL

All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

is measured with outputs open, and the A or B input (not both) at 4.5 V . Remaining inputs are grounded.

CCH

VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V, IOH = –1 mA 2.5 3.4 2.5 3.4
VCC = 4.75 V, IOH = –1 mA 2.7
VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.5 V –0.6 – 0.6 mA
VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA
VCC = 5.5 V, See Note 3 15 23 15 23 mA
VCC = 5.5 V, VI = 4.5 V 18 28 18 28 mA

switching characteristics (see Figure 1)

VCC = 5 V,
CL = 50 pF,

PARAMETER

t

PLH

t

PHL

t

PLH

t

§

PHL

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

FROM
INPUT

A or B

(other input low)

A or B

(other input high)

TO

OUTPUT

RL = 500 Ω,
TA = 25°C

′F86 SN54F86 SN74F86

MIN TYP MAX MIN MAX MIN MAX

3 4 5.5 3 7 3 6.5
3 4.2 5.5 2.6 8 3 6.5

3.5 5.3 7 3.5 10 3.5 8
3 4.7 6.5 3 8 3 7.5

VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500Ω,
TA = MIN to MAX

§

UNIT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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