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SN54F243, SN74F243
QUADRUPLE BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDFS086 – MARCH 1987 – REVISED OCTOBER 1993
• Asynchronous Communication Between
Data Buses
• Local Bus-Latch Capability
• True Logic
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These quadruple bus transceivers are designed
for asynchronous communications between data
buses. The control function implementation allows
for maximum flexibility in timing. These devices
allow data transmission from the A bus to the
B bus or from the B bus to the A bus depending
upon the logic levels at the output-enable (OEBA
and OEAB
be used to disable the device so that the buses are
effectively isolated.
The dual-enable configuration gives the
quadruple bus transceivers the capability to store
data by simultaneous enabling of OEBA and
OEAB
transceiver configuration. Thus, when both control
inputs are enabled and all other data sources to
the two sets of bus lines are at high impedance,
both sets of bus lines (eight in all) remain at their
states. The 4-bit codes appearing on the two sets
of buses will be identical for the ′F243.
) inputs. The output-enable inputs can
. Each output reinforces its input in this
SN54F243 ...J PACKAGE
SN74F243 ...D OR N PACKAGE
OEAB
A1
NC
A2
NC
A3
NC – No internal connection
(TOP VIEW)
14
13
12
11
10
NC
NC
9
8
CC
V
B4
V
CC
OEBA
NC
B1
B2
B3
B4
OEBA
18
17
16
15
14
B3
1
NC
2
A1
3
A2
4
A3
5
A4
6
GND
SN54F243 . . . FK PACKAGE
7
(TOP VIEW)
NC
OEAB
3212019
4
5
6
7
8
910111213
A4
GND
NC
NC
B1
NC
B2
The SN54F243 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F243 is characterized for
operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
INPUTS
OEAB
OEBA
L L A to B
H H B to A
H L Isolation
L H
Latch A and B
(A = B)
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–1
SN54F243, SN74F243
QUADRUPLE BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDFS086 – MARCH 1987 – REVISED OCTOBER 1993
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OEBA
OEAB
A1
A2
A3
A4
13
1
3
4
5
6
EN1
EN2
1
2
logic diagram (positive logic)
A1
1
3
OEAB
13
11
11
10
9
8
B1
B2
B3
B4
OEBA
B1
4
A2
5
A3
6
A4
Pin numbers shown are for the D, J, and N packages.
10
B2
9
B3
8
B4
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265