Texas Instruments SN54ALS874BJT, SN74ALS874BDW, SN74ALS874BDWR, SN74AS874DW, SN74AS874DWR Datasheet
...
SN54ALS874B, SN74ALS874B, SN74ALS876A
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• Choice of True or Inverting Logic
– SN54ALS874B, SN74ALS874B,
SN74AS874 Have True Outputs
– SN74ALS876A, SN74AS876 Have
Inverting Outputs
• Asynchronous Clear
• Package Options Include Plastic
Small-Outline (DW) Packages, Plastic (FN)
and Ceramic (FK) Chip Carriers, and
Standard Plastic (NT) and Ceramic (JT)
300-mil DIPs
description
These dual 4-bit D-type edge-triggered flip-flops
feature 3-state outputs designed specifically as
bus drivers. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
The edge-triggered flip-flops enter data on the
low-to-high transition of the clock (CLK) input.
The SN54ALS874B, SN74ALS874B, and
SN74AS874 have clear (CLR
noninverting Q outputs. The SN74ALS876A and
SN74AS876 have preset (PRE
inverting Q
four Q or Q
outputs; taking PRE low causes the
outputs to go low independently of the
clock.
The SN54ALS874B is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ALS874B, SN74ALS876A,
SN74AS874, and SN74AS876 devices are
characterized for operation from 0°C to 70°C.
) inputs and
) inputs and
SN74ALS874B, SN74AS874 . . . DW OR NT PACKAGE
SN74ALS876A, SN74AS876 . . . DW OR NT PACKAGE
SN54ALS874B ...JT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
1CLR
NC
28 27 26
15 16 17 18
NC
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CC
V
2CLR
24
23
22
21
20
19
18
17
16
15
14
13
1CLR
1OE
1D1
1D2
1D3
1D4
2D1
2D2
2D3
2D4
2OE
GND
SN54ALS874B . . . FK PACKAGE
1D2
5
1D3
6
1D4
7
NC
8
2D1
9
2D2
10
2D3
11
NC – No internal connection
4
12
1D1
13 14
2D4
(TOP VIEW)
1OE
321
2OE
(TOP VIEW)
1PRE
1OE
1D1
1D2
1D3
1D4
2D1
2D2
2D3
2D4
2OE
GND
V
CC
1CLK
1Q1
1Q2
1Q3
1Q4
2Q1
2Q2
2Q3
2Q4
2CLK
2CLR
1CLK
1Q1
2Q4
2CLK
V
CC
1CLK
1Q
1Q
1Q3
1Q
2Q
2Q
2Q3
2Q
2CLK
2PRE
25
24
23
22
21
20
19
1
2
4
1
2
4
1Q2
1Q3
1Q4
NC
2Q1
2Q2
2Q3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
SN54ALS874B, SN74ALS874B, SN74ALS876A
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
Function Tables
logic symbols
SN54ALS874B, SN74ALS874B, SN74AS874
SN54ALS874B, SN74ALS874B, SN74AS874
OE CLR CLK D
L L X X L
L H ↑ HH
LH↑LL
LHLX Q
HXXX Z
OE PRE CLK D
L L X X L
L H ↑ HL
LH↑LH
LHLX Q
HXXX Z
(each flip-flop)
INPUTS
SN74ALS876A, SN74AS876
(each flip-flop)
INPUTS
OUTPUT
OUTPUT
Q
0
Q
0
†
SN74ALS876A, SN74AS876
2
1OE
1D1
1D2
1D3
1D4
2OE
2D1
2D2
2D3
2D4
23
1
3
4
5
6
11
14
13
7
8
9
10
1CLK
1CLR
2CLK
2CLR
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
EN
R
1D
EN
R
1D
C1
C1
22
21
20
19
18
17
16
15
1CLK
1PRE
1Q1
1Q2
1Q3
1Q4
2CLK
2PRE
2Q1
2Q2
2Q3
2Q4
1OE
1D1
1D2
1D3
1D4
2OE
2D1
2D2
2D3
2D4
2
23
1
3
4
5
6
11
14
13
7
8
9
10
EN
S
1D
EN
S
1D
C1
C1
22
21
20
19
18
17
16
15
1Q1
1Q
1Q
1Q
2Q
2Q
2Q
2Q
2
3
4
1
2
3
4
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagrams (positive logic)
SN54ALS874B, SN74ALS874B, SN74ALS876A
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
SN54ALS874B, SN74ALS874B, SN74AS874
OE
CLK
CLR
D1
D2
D3
D4
(each quad flip-flop)
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
Q1
Q2
Q3
Q4
OE
CLK
PRE
D1
D2
D3
D4
SN74ALS876A, SN74AS876
(each quad flip-flop)
S
C1
1D
S
C1
1D
S
C1
1D
S
C1
1D
Q
1
Q
2
Q
3
Q
4
Pin numbers shown are for the DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS874B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS874B, SN74ALS876A 0°C to 70°C. . . . . . . . . . . . . . . . .
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ALS874B, SN74ALS874B, SN74ALS876A
t
S
CLK↑
ns
V
4.5 V
VOLV
4.5 V
V
I
mA
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
recommended operating conditions
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w
su
t
h
T
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –1 –2.6 mA
Low-level output current 12 24 mA
Clock frequency 0 25 0 30 MHz
PRE or CLR low 15 10
Pulse duration
etup time before
Hold time, data after CLK↑ 4 0 ns
Operating free-air temperature –55 125 0 70 °C
CLK high 20 16.5
CLK low 20 16.5
Data 15 15
PRE or CLR inactive 15 10
SN54ALS874B
MIN NOM MAX MIN NOM MAX
SN74ALS874B
SN74ALS876A
UNIT
ns
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
V
IK
V
OH
I
OZH
I
OZL
I
I
I
IH
I
IL
‡
I
O
′ALS874B VCC = 5.5 V
CC
SN74ALS876A VCC = 5.5 V
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
=
CC
=
CC
VCC = 5.5 V, VO = 2.7 V 20 20 µA
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.2 –0.2 mA
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
IOH = –1 mA 2.4 3.3
IOH = –2.6 mA 2.4 3.2
IOL = 12 mA 0.25 0.4 0.25 0.4
IOL = 24 mA 0.35 0.5
Outputs high 14 21 14 21
Outputs low 19 30 19 30
Outputs disabled 20 32 20 32
Outputs high 14 21
Outputs low 18 29
Outputs disabled 20 31
SN54ALS874B
MIN TYP†MAX MIN TYP†MAX
SN74ALS874B
SN74ALS876A
UNIT
V
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS874B, SN74ALS874B, SN74ALS876A
CLK
A
Q
ns
OE
A
Q
ns
OE
A
Q
ns
CLK
A
Q
ns
OE
A
Q
ns
OE
A
Q
ns
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
CLR
TO
(OUTPUT)
ny
Any Q
ny
ny
switching characteristics (see Figure 1)
PARAMETER
f
max
t
PLH
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
PRE
TO
(OUTPUT)
ny
Any Q
ny
ny
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
SN54ALS874B SN74ALS874B
MIN MAX MIN MAX
25 30 MHz
4 18 4 14
4 16 4 14
5 23 5 17 ns
4 24 4 18
4 21 4 18
2 15 2 10
3 22 3 12
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
SN74ALS876A
,
†
,
†
MIN MAX
30 MHz
4 14
4 14
6 19 ns
4 18
4 18
2 10
3 13
UNIT
UNIT
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN74AS874, SN74AS876 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . .
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
‡
5
SN54ALS874B, SN74ALS874B, SN74ALS876A
UNIT
t
S
CLK↑
ns
V
V
I
V
5.5 V
V
0.4 V
mA
I
mA
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
recommended operating conditions
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w
su
t
h
T
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –15 –15 mA
Low-level output current 48 48 mA
Clock frequency 0 125 0 80 MHz
PRE or CLR low 2 4.5
Pulse duration
etup time before
Hold time, data after CLK↑ 1 2 ns
Operating free-air temperature 0 70 0 70 °C
CLK high
CLK low 4 6.2
Data 2 4.5
PRE or CLR inactive 4 5
SN74AS874 SN74AS876
MIN NOM MAX MIN NOM MAX
3 6.2
ns
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74AS874
PARAMETER TEST CONDITIONS
V
IK
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
IL
I
O
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
D
All others
‡
SN74AS874 VCC = 5.5 V
SN74AS876 VCC = 5.5 V
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2
VCC = 4.5 V, IOH = –15 mA 2.4 3.3
VCC = 4.5 V, IOL = 48 mA 0.35 0.5 V
VCC = 5.5 V, VO = 2.7 V 50 µA
VCC = 5.5 V, VO = 0.4 V –50 µA
VCC = 5.5 V, VI = 7 V 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 µA
,
=
CC
VCC = 5.5 V, VO = 2.25 V –30 –112 mA
=
I
Outputs high 82 133
Outputs low 92 149
Outputs disabled 100 160
Outputs high 88 142
Outputs low 94 150
Outputs disabled 100 160
SN74AS876
MIN TYP†MAX
–2
–0.5
UNIT
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS874B, SN74ALS874B, SN74ALS876A
CLK
A
Q
ns
OE
A
Q
ns
OE
A
Q
ns
CLK
A
Q
ns
OE
A
Q
ns
OE
A
Q
ns
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
CLR
TO
(OUTPUT)
ny
Any Q
ny
ny
switching characteristics (see Figure 1)
PARAMETER
f
max
t
PLH
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
PRE
TO
(OUTPUT)
ny
Any Q
ny
ny
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
,
UNIT
†
SN74AS874
MIN MAX
125 MHz
3 8.5
4 10.5
4 9.5 ns
2 7
3 10.5
2 6
2 7.5
,
UNIT
†
SN74AS876
MIN MAX
80 MHz
3 8.5
4 10.5
4 9.5 ns
2 7
3 11
2 7
2 7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
SN54ALS874B, SN74ALS874B, SN74ALS876A
SN74AS874, SN74AS876
DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C – APRIL 1982 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
V
CC
R
L
From Output
Under Test
(see Note A)
C
L
Test
Point
R
L
From Output
Under Test
(see Note A)
Test
Point
C
L
From Output
Under Test
(see Note A)
7 V
RL = R1 = R2
S1
R1
C
L
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
8
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