TEXAS INSTRUMENTS SN54ALS74A Technical data

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SN54ALS74A, SN54AS74, SN74ALS74A, SN74AS74

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED

FLIP-FLOPS WITH CLEAR AND PRESET

SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987

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TYPICAL MAXIMUM

TYPE

’ALS74A 50 MHz 6 mW

’AS74 134 MHz 26 mW

CLOCK FREQUENCY

(CL = 50 pF)

description

These devices contain two independent D-type
positive-edge triggered flip-flops. A low level at the
Preset or Clear inputs sets or resets the outputs
regardless of the levels of the other inputs. When
Preset and Clear are inactive (high), data at the D
input meeting the setup time requirements are
transferred to the outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at
a voltage level and is not directly related to the rise
time of the clock pulse. Following the hold time
interval, data at the D input may be changed
without affecting the levels at the outputs.

The SN54ALS74A and SN54AS74 are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
SN74ALS74A and SN74AS74 are characterized
for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

PRESET CLEAR CLOCK D Q Q

L H X X H L

H LXXLH

LLXXH
HH↑HHL
H H ↑ LLH
H H L XQ

†

The output levels in this configuration are not guaranteed
to meet the minimum levels for VOH if the lows at Preset and
Clear are near VIL maximum. Furthermore, this
configuration is nonstable; that is, it will not persist when
Preset or Clear; returns to their inactive (high) level.

TYPICAL POWER

DISSIPATION

PER FLIP-FLOP

OUTPUTS

†

H

Q

O

†

O

SN54ALS74A, SN54AS74 ...J PACKAGE

SN74ALS74A, SN74AS74 ...D OR N PACKAGE

SN54ALS74A, SN54AS74 . . . FK PACKAGE

1CLK

NC

1PRE

NC

1Q

NC – No internal connection

logic symbol

1D

2D

4
3
2
1
10
11
12
13

1PRE

1CLK

1CLR

2PRE

2CLK

2CLR

‡

This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

Pin numbers shown are for D, J, and N packages.

(TOP VIEW)

1CLR

1CLK
1PRE

GND

1D

1Q
1Q

(TOP VIEW)

1
2
3
4
5
6
7

1D

3212019

4
5
6
7
8

910111213

1Q

‡

S

C1

1D
R

1CLR

NC

NC

GND

14
13
12
11
10

9
8

CC

V

2Q

V

CC

2CLR
2D
2CLK
2PRE
2Q
2Q

2CLR

18
17
16
15
14

2Q

2D
NC
2CLK
NC
2PRE

5

6

9

8

1Q

1Q

2Q

2Q

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1987, Texas Instruments Incorporated

1

SN54ALS74A, SN54AS74, SN74ALS74A, SN74AS74

UNIT

tsuSetup time before CLK↑

ns

PARAMETER

TEST CONDITIONS

UNIT

V

I

V

V

V

A

I

V

V

V

A

I

V

V

V

A

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET

SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range: SN54ALS74A, SN54ALS74 –55°C to 125°C. . . . . . . . . . . . . . . . . . .

SN74ALS74A, SN74ALS74 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

SN54AS74 SN74AS74

MIN NOM MAX MIN NOM MAX

V

Supply voltage 4.5 5 5.5 4.5 5 5.5 V

CC

V

High-level input voltage 2 2 V

IH

0.8

V

Low-level input voltage

IL

I

High-level output current –0.4 –0.4 mA

OH

I

Low-level output current 4 8 mA

OL

f

Clock frequency 0 25 0 34 MHz

clock

PRE or CLR low 15 15

t

Pulse duration

w

p

t

Hold time, data after CLK↑ 0 0 ns

h

T

Operating free-air temperature –55 125 0 70 °C

A

†

Tested at –55°C to 70°C.

‡

Tested at 70°C 125°C, per MIL-STD-883, method 5005, sub-group 1, 2, and 3. Static tests are performed at 25°C, 125°C, and –55°C.

CLK high
CLK low 16.5 14.5
Data 15 15
PRE or CLR inactive 10 10

16.5 14.5

0.8

0.7

†
‡

V

ns

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54AS74 SN74AS74

MIN TYP§MAX MIN TYP§MAX

V

IK

V

OH

V

OL

V

OL

CLK or D

I

PRE or CLR
CLK or D

IH

PRE or CLR
CLK or D

IL

PRE or CLR

¶

I

O

I

CC

§

All typical values are at VCC = 5 V, TA = 25°C.

¶

The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

NOTE 1: ICC is measured with D, CLK, and PRE

VCC = 4.5 V, II = –18 mA –1.2 –1.5 V
VCC = 4.5 V to 5.5 V, IOH = –2mA VCC–2 VCC–2 V
VCC = 4.5 V, IOL = 4 mA 0.25 0.4 0.25 0.4
VCC = 4.5 V, IOL = 8 mA 0.35 0.5

= 4.5 V,

CC

= 4.5 V,

CC

= 4.5 V,

CC

VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
VCC = 5.5 V, See Note 1 2.4 4 2.4 4 mA

= 7

I

= 2.7

I

= 0.4

I

grounded, then with D, CLK, and CLR grounded.

0.1 0.1

0.2 0.2
20 20
40 40

–0.2 –0.2
–0.4 –0.4

m

µ

m

2

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