TEXAS INSTRUMENTS SN54ALS688 Technical data

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SN54ALS688, SN74ALS688

8-BIT IDENTITY COMPARATORS

SDAS228A – JUNE 1982 – REVISED JANUARY 1995

• Compare Two 8-Bit Words

• Totem-Pole Outputs (P = Q)

• ′ALS688 Are Identical to ′ALS521

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

description

These identity comparators perform comparisons on two 8-bit binary or BCD words and provide P = Q

outputs. These devices have totem-pole

outputs. The SN54ALS688 is characterized for operation

over the full military temperature range of –55°C to 125°C. The SN74ALS688 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

DATA

ENABLE

P, Q

P = Q L L P > Q LH P < Q LH

XHH

P = Q

SN54ALS688 ...J PACKAGE

SN74ALS688 ...DW OR N PACKAGE

SN54ALS688 . . . FK PACKAGE

(TOP VIEW)

8 9

GND

(TOP VIEW)

Q0P0G

3212019

4 5 6 7 8

910111213

20 19 18 17 16 15 14 13 12 11

P = Q Q7 P7 Q6 P6 Q5 P5 Q4 P4

18 17 16 15 14

P5 P = Q

Q7 P7 Q6 P6 Q5

GND

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS688, SN74ALS688 8-BIT IDENTITY COMPARATORS

SDAS228A – JUNE 1982 – REVISED JANUAR Y 1995

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

†

G1 0

7 0

COMP

1P=Q

P0 P1 P2 P3 P4 P5 P6

P7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

2 4 6 8 11 13 15 17 3 5 7 9 12 14 16 18

P = Q

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

SN54ALS688, SN74ALS688

8-BIT IDENTITY COMPARATORS

SDAS228A – JUNE 1982 – REVISED JANUARY 1995

P = Q

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V Input voltage, V Operating free-air temperature range, T

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

: SN54ALS688 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74ALS688 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ALS688, SN74ALS688

UNIT

PARAMETER

TEST CONDITIONS

UNIT

(

)

(

)

(INPUT)

(OUTPUT)

8-BIT IDENTITY COMPARATORS

SDAS228A – JUNE 1982 – REVISED JANUAR Y 1995

recommended operating conditions

SN54ALS688 SN74ALS688

MIN NOM MAX MIN NOM MAX

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

†

All typical values are at VCC = 5 V, TA = 25°C.

‡

The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

NOTE 1: ICC is measured with G

Supply voltage 4.5 5 5.5 4.5 5 5.5 V High-level input voltage 2 2 V Low-level input voltage 0.7 0.8 V High-level output current –1 –2.6 mA Low-level output current 12 24 mA Operating free-air temperature –55 125 0 70 °C

SN54ALS688 SN74ALS688

MIN TYP†MAX MIN TYP†MAX

I I I I I

I IH IL O CC

‡

VCC = 4.5 V, II = –18 mA –1.5 –1.5 V VCC = 4.5 V to 5.5 V, IOH = – 0.4 mA VCC –2 VCC –2

= 4.5

VCC = 5.5 V, VI = 7 V 0.1 0.1 mA VCC = 5.5 V, VI = 2.7 V 20 20 µA VCC = 5.5 V, VI = 0.4 V –0.1 –0.1 mA VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA VCC = 5.5 V, See Note 1 12 19 12 19 mA

grounded, P and Q at 4.5 V.

IOH = – 1 mA 2.4 3.3 IOH = – 2.6 mA 2.4 3.3 IOL = 12 mA 0.25 0.4 0.25 0.4 IOL = 24 mA 0.35 0.5

switching characteristics (see Figure 1)

VCC = 4.5 V to 5.5 V, CL = 50 pF,

PARAMETER

PLH

PHL

PLH

PHL

PLH

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

PHL

FROM INPUT

OUTPUT

RL = 500 Ω TA = MIN to MAX

SN54ALS688 SN74ALS688

MIN MAX MIN MAX

3 16 3 12 5 25 5 20 3 16 3 12 5 25 5 20 3 15 3 12 5 25 5 22

UNIT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

From Output

Under Test

(see Note A)

SN54ALS688, SN74ALS688

8-BIT IDENTITY COMPARATORS

SDAS228A – JUNE 1982 – REVISED JANUARY 1995

PARAMETER MEASUREMENT INFORMATION

SERIES 54ALS/74ALS AND 54AS/74AS DEVICES

7 V

Test Point

From Output

Under Test

(see Note A)

Test Point

From Output

Under Test

(see Note A)

RL = R1 = R2

Test Point

LOAD CIRCUIT FOR

BI-STATE

TOTEM-POLE OUTPUTS

Timing

Input

Data

Input

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Output

Control

(low-level

enabling)

Waveform 1

S1 Closed

(see Note B)

Waveform 2

S1 Open

(see Note B)

PZL

PZH

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

VOLTAGE WAVEFORMS

1.3 V

PHZ

1.3 V

1.3 V1.3 V

FOR OPEN-COLLECTOR OUTPUTS

PLZ

LOAD CIRCUIT

3.5 V

0.3 V

3.5 V

0.3 V

3.5 V

0.3 V

[

3.5 V

0.3 V

[

0 V

High-Level

Low-Level

Out-of-Phase

(see Note C)

Pulse

Input

In-Phase

Output

LOAD CIRCUIT

FOR 3-STATE OUTPUTS

1.3 V 1.3 V

VOLTAGE WAVEFORMS

PULSE DURATIONS

1.3 V 1.3 V

PLH

PHL

1.3 V 1.3 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

1.3 V1.3 V

PHL

PLH

3.5 V

0.3 V

3.5 V

0.3 V

3.5 V

0.3 V

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

26-Sep-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

5962-88578012A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 5962-8857801RA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 5962-8857801SA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC

SN54ALS688J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC

SN74ALS688DW ACTIVE SOIC DW 20 25 Green (RoHS &

no Sb/Br)

SN74ALS688DWE4 ACTIVE SOIC DW 20 25 Green (RoHS &

no Sb/Br)

SN74ALS688DWR ACTIVE SOIC DW 20 2000 Green (RoHS &

no Sb/Br)

SN74ALS688DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &

no Sb/Br)

SN74ALS688N ACTIVE PDIP N 20 20 Pb-Free

SN74ALS688N3 OBSOLETE PDIP N 20 TBD Call TI Call TI

SN74ALS688NE4 ACTIVE PDIP N 20 20 Pb-Free

SN74ALS688NSR ACTIVE SO NS 20 2000 Green (RoHS &

no Sb/Br)

SN74ALS688NSRE4 ACTIVE SO NS 20 2000 Green (RoHS &

no Sb/Br)

SNJ54ALS688FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC

SNJ54ALS688J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC

SNJ54ALS688W ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

26-Sep-2005

Addendum-Page 2

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A SQ

B SQ

12826 27

1314151618 17

0.020 (0,51)

0.010 (0,25)

MIN

0.342

(8,69)

0.442

0.640

0.739

0.938

1.141

0.358 (9,09)

0.458

(11,63)

0.660

(16,76)

0.761

(19,32)(18,78)

0.962

(24,43)

1.165

(29,59)

NO. OF

TERMINALS

432

0.020 (0,51)

0.010 (0,25)

(11,23)

(16,26)

(23,83)

(28,99)

MINMAX

0.307 (7,80)

0.406

(10,31)

0.495

(12,58)

0.495

(12,58)

0.850 (21,6)

1.047 (26,6)

0.080 (2,03)

0.064 (1,63)

MAX

0.358 (9,09)

0.458

(11,63)

0.560

(14,22)

0.560

(14,22)

0.858 (21,8)

1.063 (27,0)

0.055 (1,40)

0.045 (1,14)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

4040140/D 10/96

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TEXAS INSTRUMENTS SN54ALS688 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual