TEXAS INSTRUMENTS SN54ALS574B Technical data
查询54ALS574供应商
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
• 3-State Buffer-Type Noninverting Outputs
Drive Bus Lines Directly
• Bus-Structured Pinout
• Buffered Control Inputs
• SN74ALS575A and ′AS575 Have
Synchronous Clear
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J, JT) 300-mil DIPs, and
Ceramic Flat (W) Packages
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input. The
SN74ALS575A, SN54AS575, and SN74AS575
may be synchronously cleared by taking the clear
(CLR
) input low.
The output-enable (OE
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and
SN54AS575 are characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74ALS574B, SN74ALS575A,
SN74AS574, and SN74AS575 are characterized
for operation from 0°C to 70°C.
) input does not affect
SN54ALS574B, SN54AS574 ...J OR W PACKAGE
SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE
SN54ALS574B, SN54AS574 . . . FK PACKAGE
SN54AS575 . . . JT OR W PACKAGE
SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
3D
4D
5D
6D
7D
CLR
OE
1D
2D
3D
4D
5D
6D
7D
8D
NC
GND
(TOP VIEW)
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
(TOP VIEW)
2D1DOE
3212019
4
5
6
7
8
9
10 111213
8D
CLK
GND
(TOP VIEW)
24
1
23
2
22
3
21
4
20
5
19
6
18
7
17
8
16
9
15
10
14
11
13
12
V
8Q
CC
V
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
1Q
18
17
16
15
14
7Q
V
CC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
CC
2Q
3Q
4Q
5Q
6Q
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2D
3D
4D
NC
5D
6D
7D
NC – No internal connection
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS575 ...FK PACKAGE
(TOP VIEW)
CC
14
NC
NC
28 27 26
1516 17
NC
GND
V
NC
NC
18
CLK
1Q
25
24
23
22
21
20
19
8Q
2Q
3Q
4Q
NC
5Q
6Q
7Q
1DOECLR
4
321
5
6
7
8
9
10
11
12
13
8D
Copyright 1995, Texas Instruments Incorporated
1
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
Function Tables
SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574
OE CLK D
SN74ALS575A, SN54AS575, SN74AS575
OE CLR CLK D
L L ↑ X L
L H ↑ HH
LH↑LL
LHLX Q
HXHX Z
logic symbols
1
OE
11
CLK
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, JT, N, and NT packages.
†
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
EN
C1
1D
(each flip-flop)
INPUTS
L ↑ H H
L ↑ LL
LLX Q
HXX Z
(each flip-flop)
INPUTS
19
1Q
18
2Q
17
3Q
16
4Q
15
5Q
14
6Q
13
7Q
12
8Q
OUTPUT
OE
CLK
CLR
1D
2D
3D
4D
5D
6D
7D
8D
Q
0
OUTPUT
Q
2
14
1
3
4
5
6
7
8
9
10
0
SN74ALS575A, SN54AS575,
SN74AS575
EN
C1
1R
1D
22
21
20
19
18
17
16
15
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
f
Clock frequenc
MH
twPulse duration
ns
t
S
CLK↑
ns
t
Hold ti
CLK↑
ns
logic diagrams (positive logic)
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
SDAS165B – JUNE 1982 – REVISED JULY 1995
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
1
OE
11
CLK
C1
2
1D
To Seven Other Channels
Pin numbers shown are for the DW, J, JT, N, and NT packages.
1D
19
1Q
OE
CLK
CLR
1D
SN74ALS575A, SN54AS575,
SN74AS575
2
14
1
3
To Seven Other Channels
1D
C1
22
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS574B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS574B, SN74ALS575A 0°C to 70°C. . . . . . . . . . . . . . . . .
1Q
†
recommended operating conditions
V
CC
V
IH
V
IL
I
OH
I
OL
clock
su
h
T
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –1 –2.6 mA
Low-level output current 12 24 mA
y
etup time before
me after
Operating free-air temperature –55 125 0 70 °C
′ALS574B 0 28 0 35
SN74ALS575A
′ALS574B, CLK high or low 16.5 14
SN74ALS575A, CLK high or low 16.5
Data 15 15
SN74ALS575A, CLR 15
Data 4 0
SN74ALS575A, CLR 0
SN54ALS574B
MIN NOM MAX MIN NOM MAX
SN74ALS574B
SN74ALS575A
0 30
UNIT
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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