Texas Instruments SN54ALS564BJ, SN74ALS564BDW, SN74ALS564BDWR, SN74ALS564BN, SNJ54ALS564BFK Datasheet
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SN54ALS564B, SN74ALS564B
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS164B – APRIL 1982 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• 3-State Buffer-Type Inverting Outputs Drive
Bus Lines Directly
• Bus-Structured Pinout
• Buffered Control Inputs
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
description
These octal D-type edge-triggered flip-flops
feature inverting 3-state outputs designed
specifically for bus driving. They are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input.
The output-enable (OE
) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are in the high-impedance state.
The SN54ALS564B is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ALS564B is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE CLK D
Q
L ↑ H L
L ↑ LH
LLX Q
0
HXX Z
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
SN54ALS564B ...J OR W PACKAGE
SN74ALS564B . . . DW OR N PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
SN54ALS564B . . . FK PACKAGE
(TOP VIEW)
2D1DOE
8Q
7Q 1Q
8D
GND
CLK
V
CC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54ALS564B, SN74ALS564B
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS164B – APRIL 1982 – REVISED JANUARY 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
logic diagram (positive logic)
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
11
CLK
19
18
17
16
15
14
13
12
7
6D
8
7D
9
8D
EN
1
OE
CLK
1D
1Q
1
11
2
19
To Seven Other Channels
C1
1D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
C1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS564B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS564B 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS564B SN74ALS564B
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.7 0.8 V
I
OH
High-level output current –1 –2.6 mA
I
OL
Low-level output current 12 24 mA
f
clock
Clock frequency 0 22 0 30 MHz
t
w
Pulse duration, CLK high or low 25 14 ns
t
su
Setup time, data before CLK↑ 15 15 ns
t
h
Hold time, data after CLK↑ 4 0 ns
T
A
Operating free-air temperature –55 125 0 70 °C
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