Texas Instruments SN54ALS541J, SN74ALS540N3, SN74ALS541-1DW, SN74ALS541-1N, SN74ALS541DBR Datasheet
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SN54ALS541, SN74ALS540, SN74ALS541
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SDAS025C – APRIL 1982 – REVISED JANUARY 1995
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• pnp Inputs Reduce dc Loading
• Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
description
These octal buffers and line drivers are designed
to have the performance of the popular
SN54ALS240A/SN74ALS240A series and, at the
same time, offer a pinout with inputs and outputs
on opposite sides of the package. This
arrangement greatly facilitates printed-circuitboard layout.
The 3-state control gate is a 2-input NOR such that
if either output-enable (OE1
all eight outputs are in the high-impedance state.
The SN74ALS540 provides inverted data. The
′ALS541 provide true data at the outputs.
The -1 versions of SN74ALS540 and
SN74ALS541 are identical to the standard
versions, except that the recommended maximum
I
is increased to 48 mA. There is no -1 version
OL
of the SN54ALS541.
or OE2) input is high,
SN74ALS540, SN74ALS541 . . . DW OR N PACKAGE
SN54ALS541 ...J PACKAGE
(TOP VIEW)
Y8
20
19
18
17
16
15
14
13
12
11
V
CC
Y7
V
CC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
Y6 OE2
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND
SN54ALS541 . . . FK PACKAGE
A3
A4
A5
A6
A7
10
(TOP VIEW)
A2A1OE1
3 2 1 20 19
4
5
6
7
8
910111213
A8
GND
Y1
Y2
Y3
Y4
Y5
The SN54ALS541 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ALS540 and SN74ALS541 are characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ALS541, SN74ALS540, SN74ALS541
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SDAS025C – APRIL 1982 – REVISED JANUARY 1995
logic symbols
1
OE1
19
OE2
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
SN74ALS540
&
EN
18
17
16
15
14
13
12
11
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
1
19
2
3
4
5
6
7
8
9
logic diagrams (positive logic)
SN74ALS540 ′ALS541
1
OE1
OE2
19
OE1
OE2
1
19
′ALS541
&
EN
18
17
16
15
14
13
12
11
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A1
2
To Seven Other Channels
18
Y1
A1
2
To Seven Other Channels
18
Y1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS541 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS540, SN74ALS541 0°C to 70°C. . . . . . . . . . . . . . . . . . . .
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS541, SN74ALS540, SN74ALS541
IOLLow-level output current
mA
V
V
I
mA
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SDAS025C – APRIL 1982 – REVISED JANUARY 1995
recommended operating conditions
SN54ALS541
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
T
A
†
Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –12 –15 mA
p
Operating free-air temperature –55 125 0 70 °C
12 24
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
V
IK
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
§
I
O
SN74ALS540 VCC = 5.5 V
CC
′ALS541 VCC = 5.5 V
†
Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
IOH = –3 mA 2.4 3.2 2.4 3.2
VCC = 4.5 V
VCC = 4.5 V
VCC = 5.5 V, VO = 2.7 V 20 20 µA
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.2 –0.1 mA
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
IOH = –12 mA 2
IOH = –15 mA 2
IOL = 12 mA 0.25 0.4 0.25 0.4
IOL = 24 mA 0.35 0.5
IOL = 48 mA
Outputs high 5 10 5 10
Outputs low 13 22 13 22
Outputs disabled 11 19 11 19
Outputs high 6 14 6 14
Outputs low 15 25 15 25
Outputs disabled 13.5 32 13.5 22
†
SN54ALS541
MIN TYP‡MAX MIN TYP‡MAX
SN74ALS540
SN74ALS541
SN74ALS540
SN74ALS541
0.35 0.5
48
UNIT
†
UNIT
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ALS541, SN74ALS540, SN74ALS541
A
Y
ns
OE
Y
ns
OE
Y
ns
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SDAS025C – APRIL 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
TO
(OUTPUT)
SN54ALS541 SN74ALS540 SN74ALS541
MIN MAX MIN MAX MIN MAX
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
4 17 2 12 4 14
2 14 2 9 2 10
5 18 5 15 5 15
8 28 8 20 8 20
1 12 1 10 1 10
2 14 2 12 2 12
,
†
UNIT
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
(see Note A)
SN54ALS541, SN74ALS540, SN74ALS541
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SDAS025C – APRIL 1982 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
V
CC
S1
R
L
Test
Point
C
L
R
L
From Output
Under Test
C
(see Note A)
Test
Point
L
From Output
Under Test
(see Note A)
R1
C
L
RL = R1 = R2
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
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Copyright 1998, Texas Instruments Incorporated
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