SN54ALS157A, SN54ALS158
SN74ALS157A, SN74ALS158, SN74AS157, SN74AS158
QUADRUPLE 1-OF-2 DATA SELECTORS/MULTIPLEXERS
SDAS081C – APRIL 1982 – REVISED DECEMBER 1994
• Buffered Inputs and Outputs
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These data selectors/multiplexers contain
inverters and drivers to supply full data selection
to the four output gates. A separate strobe (G
input is provided. A 4-bit word is selected from one
of two sources and is routed to the four outputs.
The ′ALS157A and SN74AS157 present true
data. The ′ALS158 and SN74AS158 present
inverted data to minimize propagation delay time.
The SN54ALS157A and SN54ALS158 are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
SN74ALS157A, SN74ALS158, SN74AS157, and
SN74AS158 are characterized for operation from
0°C to 70°C.
SN54ALS157A, SN54ALS158 ...J PACKAGE
SN74AS157, SN74AS158 ...D OR N PACKAGE
)
SN54ALS157A, SN54ALS158 . . . FK PACKAGE
SN74ALS157A, SN74ALS158,
(TOP VIEW)
NC
16
15
14
13
12
11
10
V
9
CC
V
G
4A
4B
4Y
3A
3B
3Y
18
17
16
15
14
1B
1Y
NC
2A
2B
1
A/B
2
1A
3
1B
4
1Y
5
2A
6
2B
7
2Y
GND
8
(TOP VIEW)
1A
A/B
3212019
4
5
6
7
8
910111213
CC
4A
4B
NC
4Y
3A
2Y
NC – No internal connection
FUNCTION TABLE
INPUTS
DATA
A B
H X X X L H
L LLXL H
LLHXH L
LHXLL H
LHXHH L
OUTPUT Y
′ALS157A ′ALS158
SN74AS157 SN74AS158
GND
NC
3Y
3B G
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1994, Texas Instruments Incorporated
1
SN54ALS157A, SN54ALS158
SN74ALS157A, SN74ALS158, SN74AS157, SN74AS158
QUAD 1-OF-2 DATA SELECTORS/MULTIPLEXERS
SDAS081C – APRIL 1982 – REVISED DECEMBER 1994
logic symbols
15
G
1
A/B
2
1A
3
1B
5
2A
6
2B
11
3A
10
3B
14
4A
13
4B
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
†
′ALS157A, SN74AS157 ′ALS158, SN74AS158
A/B
1A
1B
2A
2B
3A
3B
4A
4B
15
G
1
2
3
5
6
11
10
14
13
EN
G1
1
1
MUX
12
4
1Y
7
2Y
9
3Y
4Y
EN
G1
1
1
MUX
12
4
1Y
7
2Y
9
3Y
4Y
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagrams (positive logic)
′ALS157A ′ALS158
1A
1B
2
3
SN54ALS157A, SN54ALS158
SN74ALS157A, SN74ALS158, SN74AS157, SN74AS158
QUAD 1-OF-2 DATA SELECTORS/MULTIPLEXERS
SDAS081C – APRIL 1982 – REVISED DECEMBER 1994
2
1A
4
1Y
1B
3
4
1Y
5
2A
7
12
2Y
9
3Y
4Y
4
1Y
6
2B
11
3A
10
3B
14
4A
13
4B
15
G
1
A
/B
SN74AS157 SN74AS158
1A
1B
2
3
5
2A
7
12
2Y
9
3Y
4Y
4
1Y
6
2B
11
3A
10
3B
14
4A
13
4B
15
G
1
A
/B
2
1A
3
1B
5
2A
6
2B
11
3A
10
3B
14
4A
13
4B
15
G
1
A
/B
Pin numbers shown are for the D, J, and N packages.
12
5
2A
7
2Y
9
3Y
4Y
6
2B
11
3A
10
3B
14
4A
13
4B
15
G
1
A
/B
12
7
2Y
9
3Y
4Y
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3