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SN54ALS09, SN74ALS09
QUADRUPLE 2-INPUT POSITIVE-AND GATES
WITH OPEN-COLLECTOR OUTPUTS
SDAS084B – APRIL 1982 – REVISED DECEMBER 1994
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain four independent 2-input
positive-AND gates. They perform the Boolean
functions Y = A • B or Y = A
The open-collector outputs require pullup
resistors to perform correctly . These outputs may
be connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
often used to generate higher V
The SN54ALS09 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ALS09 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS
A B
H H H
L XL
XLL
+ B in positive logic.
levels.
OH
OUTPUT
Y
SN54ALS09 ...J PACKAGE
SN74ALS09 ...D OR N PACKAGE
SN54ALS09 . . . FK PACKAGE
1Y
NC
2A
NC
2B
NC – No internal connection
1A
1B
1Y
2A
2B
2Y
GND
3 2 1 20 19
4
5
6
7
8
9 10 11 12 13
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
7
(TOP VIEW)
1B1ANC
2Y
NC
GND
V
CC
4B
4A
4Y
3B
3A
9
3Y
8
CC
V
4B
18
4A
17
NC
16
4Y
15
NC
14
3B
3Y
3A
1
2
4
5
9
10
12
13
†
&
3
1Y
6
2Y
8
3Y
11
4Y
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
logic diagram (positive logic)
1
1A
2
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
Copyright 1994, Texas Instruments Incorporated
3
1Y
6
2Y
8
3Y
11
4Y
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1

SN54ALS09, SN74ALS09
QUADRUPLE 2-INPUT POSITIVE-AND GATES
WITH OPEN-COLLECTOR OUTPUTS
SDAS084B – APRIL 1982 – REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
†
Off-state output voltage 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
: SN54ALS09 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS09 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS09 SN74ALS09
MIN NOM MAX MIN NOM MAX
V
V
V
V
I
T
CC
IH
IL
OH
OL
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output voltage 5.5 5.5 V
Low-level output current 4 8 mA
Operating free-air temperature –55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS09 SN74ALS09
MIN TYP‡MAX MIN TYP‡MAX
V
IK
OL
I
I
I
IH
I
IL
I
OH
I
CCH
I
‡
CCL
All typical values are at VCC = 5 V, TA = 25°C.
VCC = 4.5 V, II = –18 mA –1.5 –1.5 V
= 4.5
CC
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.1 –0.1 mA
VCC = 4.5 V, VOH = 5.5 V 0.1 0.1 mA
VCC = 5.5 V, VI = 4.5 V 1.35 2.4 1.35 2.4 mA
VCC = 5.5 V, VI = 0 2.2 4 2.2 4 mA
IOL = 4 mA 0.25 0.4 0.25 0.4
IOL = 8 mA 0.35 0.5
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
t
PLH
t
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
2
PHL
FROM
INPUT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TO
OUTPUT
RL = 2 kΩ,
TA = MIN to MAX
SN54ALS09 SN74ALS09
MIN MAX MIN MAX
20 69 23 54
5 23 5 15
§
UNIT

From Output
Under Test
(see Note A)
SN54ALS09, SN74ALS09
QUADRUPLE 2-INPUT POSITIVE-AND GATES
WITH OPEN-COLLECTOR OUTPUTS
SDAS084B – APRIL 1982 – REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
V
CC
S1
R
L
Test
Point
C
L
R
L
From Output
Under Test
C
(see Note A)
Test
Point
L
From Output
Under Test
(see Note A)
R1
C
L
RL = R1 = R2
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3

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