TEXAS INSTRUMENTS SN54AHCT32 Technical data

SOIC

D

AHCT32

TSSOP

PW

HB32

查询5962-9682601QDA供应商

D

Inputs Are TTL-Voltage Compatible

D

Latch-Up Performance Exceeds 250 mA Per JESD 17

SN54AHCT32, SN74AHCT32

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCLS248L – OCTOBER 1995 – REVISED JUL Y 2003

D

ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A)

SN54AHCT32 ...J OR W PACKAGE SN74AHCT32 . . . D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

1

1A

2

1B

3

1Y

4

2A

5

2B

6

2Y

GND

7

14 13 12 11 10

V

CC

4B 4A 4Y 3B

9

3A

8

3Y

SN74AHCT32 . . . RGY PACKAGE

1B 1Y 2A 2B 2Y

(TOP VIEW)

1A

114 2 3 4 5 6

78

CC

V

13 12 11 10

4B 4A 4Y 3B

9

3A

3Y

GND

SN54AHCT32 . . . FK PACKAGE

1Y

NC

2A

NC

2B

NC – No internal connection

(TOP VIEW)

1B1ANC

3212019

4 5 6 7 8

910111213

2Y

NC

GND

CC

V

3Y

4B

18 17 16 15 14

3A

description/ordering information

The ’AHCT32 devices are quadruple 2-input positive-OR gates. These devices perform the Boolean function

Y+A

• B or Y+A)B in positive logic.

ORDERING INFORMA TION

T

A

QFN – RGY Tape and reel SN74AHCT32RGYR HB32 PDIP – N Tube SN74AHCT32N SN74AHCT32N

–40°C to 85°C

–55°C to 125°C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

SOP – NS Tape and reel SN74AHCT32NSR AHCT32 SSOP – DB Tape and reel SN74AHCT32DBR HB32

TVSOP – DGV Tape and reel SN74AHCT32DGVR HB32 CDIP – J Tube SNJ54AHCT32J SNJ54AHCT32J CFP – W Tube SNJ54AHCT32W SNJ54AHCT32W LCCC – FK Tube SNJ54AHCT32FK SNJ54AHCT32FK

PACKAGE

–

†

Tube SN74AHCT32D Tape and reel SN74AHCT32DR

Tube SN74AHCT32PW Tape and reel SN74AHCT32PWR

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

4A NC 4Y NC 3B

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2003, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

1

SN54AHCT32, SN74AHCT32 QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCLS248L – OCTOBER 1995 – REVISED JULY 2003

FUNCTION TABLE

(each gate)

INPUTS

A B

H X H X HH

L L L

logic diagram, each gate (positive logic)

OUTPUT

Y

A B

Y

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Input voltage range, V Output voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

3. The package thermal impedance is calculated in accordance with JESD 51-5.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

OK

< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

(see Note 2): DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 3): RGY package 47°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

†

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

PARAMETER

TEST CONDITIONS

V

UNIT

V

4.5 V

V

4.5 V

V

PARAMETER

UNIT

A or B

Y

C

15 pF

ns

A or B

Y

C

50 pF

ns

SN54AHCT32, SN74AHCT32

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCLS248L – OCTOBER 1995 – REVISED JULY 2003

recommended operating conditions (see Note 4)

SN54AHCT32 SN74AHCT32

MIN MAX MIN MAX

V V V V V I

OH

I

OL

∆t/∆v Input transition rise or fall rate 20 20 ns/V T

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.

†

This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.

Supply voltage 4.5 5.5 4.5 5.5 V

CC

High-level input voltage 2 2 V

IH

Low-level input voltage 0.8 0.8 V

IL

Input voltage 0 5.5 0 5.5 V

I

Output voltage 0 V

O

High-level output current –8 –8 mA Low-level output current 8 8 mA

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

TA = 25°C SN54AHCT32 SN74AHCT32

MIN TYP MAX MIN MAX MIN MAX

4.4 4.5 4.4 4.4

3.94 3.8 3.8

0.1 0.1 0.1

0.36 0.44 0.44 I I

∆I C

OH

OL

I CC

i

CC

IOH = –50 mA IOH = –8 mA IOL = 50 mA IOL = 8 mA VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1 VI = VCC or GND, IO = 0 5.5 V 2 20 20 One input at 3.4 V ,

†

Other inputs at VCC or GND VI = VCC or GND 5 V 2 10 10 pF

5.5 V 1.35 1.5 1.5 mA

CC

0 V

CC

V

m

A

m

A

switching characteristics over recommended operating free-air temperature range,

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

V

CC

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

t

PLH

t

PHL

t

PLH

t

PHL

** On products compliant to MIL-PRF-38535, this parameter is not production tested.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

p

=

L

p

=

L

TA = 25°C SN54AHCT32 SN74AHCT32

MIN TYP MAX MIN MAX MIN MAX

5** 6.9** 1** 8** 1 8 5** 6.9** 1** 8** 1 8

5.5 7.9 1 9 1 9

3

SN54AHCT32, SN74AHCT32

PARAMETER

UNIT

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCLS248L – OCTOBER 1995 – REVISED JULY 2003

noise characteristics, V

V

OL(P)

V

OL(V)

V

OH(V)

V

IH(D)

V

IL(D)

NOTE 5: Characteristics are for surface-mount packages only.

Quiet output, maximum dynamic V Quiet output, minimum dynamic V Quiet output, minimum dynamic V High-level dynamic input voltage 2 V Low-level dynamic input voltage 0.8 V

operating characteristics, V

C

Power dissipation capacitance No load, f = 1 MHz 11.5 pF

pd

= 5 V, CL = 50 pF, TA = 25°C (see Note 5)

CC

OL OL OH

= 5 V, TA = 25°C

CC

PARAMETER TEST CONDITIONS TYP UNIT

SN74AHCT32

MIN TYP MAX

0.4 0.8 V

–0.4 –0.8 V

4.5 V

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

From Output

Under Test

(see Note A)

SN54AHCT32, SN74AHCT32

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCLS248L – OCTOBER 1995 – REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

V

Test Point

C

L

From Output

Under Test

(see Note A)

C

L

RL = 1 kΩ

S1

CC

Open

GND

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open Drain

Open

V

CC

GND V

CC

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

t

w

Input

In-Phase

Output

Out-of-Phase

Output

INVERTING AND NONINVERTING OUTPUTS

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices.

1.5 V 1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

t

PLH

50% V

CC

t

PHL

50% V

CC

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

3-STATE AND OPEN-DRAIN OUTPUTS

LOAD CIRCUIT FOR

3 V

0 V

3 V

0 V

t

PHL

V

t

PLH

CC

OH

V

OL

V

OH

V

OL

50% V

Timing Input

Data Input

Output

Control

Output

Waveform 1

S1 at V

(see Note B)

Waveform 2

(see Note B)

CC

Output

S1 at GND

1.5 V

t

CC

h

t

PLZ

VOL + 0.3 V

t

PHZ

VOH – 0.3 V

t

su

1.5 V 1.5 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

1.5 V 1.5 V1.5 V 1.5 V

t

PZL

50% V

t

PZH

50% V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

3 V

0 V

3 V

0 V

3 V

0 V

≈V

V

OL

V

OH

≈0 V

CC

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

5962-9682601Q2A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 5962-9682601QCA ACTIVE CDIP J 14 1 TBD Call TI Level-NC-NC-NC 5962-9682601QDA ACTIVE CFP W 14 1 TBD Call TI Level-NC-NC-NC

SN74AHCT32D ACTIVE SOIC D 14 50 Green(RoHS &

SN74AHCT32DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI

SN74AHCT32DBR ACTIVE SSOP DB 14 2000 Green (RoHS &

SN74AHCT32DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &

SN74AHCT32DE4 ACTIVE SOIC D 14 50 Green (RoHS &

SN74AHCT32DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &

SN74AHCT32DGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &

SN74AHCT32DR ACTIVE SOIC D 14 2500 Green (RoHS &

SN74AHCT32DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &

SN74AHCT32N ACTIVE PDIP N 14 25 Pb-Free

SN74AHCT32NE4 ACTIVE PDIP N 14 25 Pb-Free

SN74AHCT32NSR ACTIVE SO NS 14 2000 Green (RoHS &

SN74AHCT32NSRE4 ACTIVE SO NS 14 2000 Green (RoHS &

SN74AHCT32PW ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHCT32PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHCT32PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHCT32PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI

SN74AHCT32PWR ACTIVE TSSOP PW 14 2000 Green (RoHS &

SN74AHCT32PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &

SN74AHCT32PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &

SN74AHCT32RGYR ACTIVE QFN RGY 14 1000 Green (RoHS &

SN74AHCT32RGYRG4 ACTIVE QFN RGY 14 1000 Green (RoHS &

SNJ54AHCT32FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC

SNJ54AHCT32J ACTIVE CDIP J 14 1 TBD Call TI Level-NC-NC-NC

SNJ54AHCT32W ACTIVE CFP W 14 1 TBD Call TI Level-NC-NC-NC

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-2-260C-1YEAR

24-Oct-2005

(3)

Addendum-Page 1