TEXAS INSTRUMENTS SN54AHCT125 Technical data

SOIC
D
AHCT125
TSSOP
PW
HB125
查询5962-9686901QDA供应商
D
D
Latch-Up Performance Exceeds 250 mA Per JESD 17
SN54AHCT125, SN74AHCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS264O – DECEMBER 1995 – REVISED JUL Y 2003
D
ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)
SN54AHCT125 ...J OR W PACKAGE SN74AHCT125 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
1OE
1 2
1A
3
1Y
4
2OE
5
2A
6
2Y
GND
7
14 13 12 11 10
V
CC
4OE 4A 4Y 3OE
9
3A
8
3Y
SN74AHCT125 . . . RGY PACKAGE
1A 1Y
2OE
2A 2Y
(TOP VIEW)
1OE3YV
114 2 3 4 5 6
78
CC
13 12
10
4OE 4A
11
4Y 3OE
9
3A
GND
SN54AHCT125 . . . FK PACKAGE
1Y
NC
2OE
NC
2A
NC – No internal connection
(TOP VIEW)
1A
1OE
NC
3212019
4 5 6 7 8
910111213
2Y
NC
GND
description/ordering information
The ’AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE gate passes the data from the A input to its Y output.
T o ensure the high-impedance state during power up or power down, OE resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMA TION
T
A
QFN – RGY Tape and reel SN74AHCT125RGYR HB125 PDIP – N Tube SN74AHCT125N SN74AHCT125N
–40°C to 85°C
–55°C to 125°C
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
SOP – NS Tape and reel SN74AHCT125NSR AHCT125 SSOP – DB Tape and reel SN74AHCT125DBR HB125
TVSOP – DGV Tape and reel SN74AHCT125DGVR HB125 CDIP – J Tube SNJ54AHCT125J SNJ54AHCT125J CFP – W Tube SNJ54AHCT125W SNJ54AHCT125W LCCC – FK Tube SNJ54AHCT125FK SNJ54AHCT125FK
PACKAGE
Tube SN74AHCT125D Tape and reel SN74AHCT125DR
Tube SN74AHCT125PW Tape and reel SN74AHCT125PWR
) input is high. When OE is low, the respective
should be tied to VCC through a pullup
ORDERABLE
PART NUMBER
TOP-SIDE MARKING
CC
V
3Y
4OE
18 17 16 15 14
3A
4A NC 4Y NC 3OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
1
SN54AHCT125, SN74AHCT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SCLS264O – DECEMBER 1995 – REVISED JULY 2003
logic diagram (positive logic)
1
1OE
FUNCTION TABLE
(each buffer)
INPUTS
OE A
L H H L LL
H X Z
OUTPUT
Y
2
1A 1Y
4
2OE
5
2A 2Y
10
3OE
9
3A 3Y
13
4OE
12
4A 4Y
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
3
6
8
11
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
UNIT
SN54AHCT125, SN74AHCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS264O – DECEMBER 1995 – REVISED JULY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V Input voltage range, V Output voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(V
< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(V
= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
O
or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
(see Note 2): DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package 47°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 4)
SN54AHCT125 SN74AHCT125
MIN MAX MIN MAX
V V V V V I
OH
I
OL
t/v Input transition rise or fall rate 20 20 ns/V T
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
High-level output current –8 –8 mA Low-level output current 8 8 mA
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
0 V
CC
V
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
SN54AHCT125, SN74AHCT125
PARAMETER
TEST CONDITIONS
V
UNIT
V
4.5 V
V
V
4.5 V
V
PARAMETER
UNIT
AYC
15 pF
ns
OE
Y
C
15 pF
ns
OE
Y
C
15 pF
ns
AYC
50 pF
ns
OE
Y
C
50 pF
ns
OE
Y
C
50 pF
ns
PARAMETER
UNIT
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SCLS264O – DECEMBER 1995 – REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
CC
OH
OL
I
I
I
OZ
I
CC
I
CC
C
i
C
o
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
IOH = –50 mA IOH = –8 mA IOL = 50 mA IOL = 8 mA VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1 VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5 VI = VCC or GND, IO = 0 5.5 V 2 20 20 One input at 3.4 V ,
Other inputs at VCC or GND VI = VCC or GND 5 V 4 10 10 pF VO = VCC or GND 5 V 15 pF
5.5 V 1.35 1.5 1.5 mA
TA = 25°C SN54AHCT125 SN74AHCT125
MIN TYP MAX MIN MAX MIN MAX
4.4 4.5 4.4 4.4
3.94 3.8 3.8
0.1 0.1 0.1
0.36 0.44 0.44
m
A
m
A
m
A
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(o)
** On products compliant to MIL-PRF-38535, this parameter is not production tested. *** On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, V
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
NOTE 5: Characteristics are for surface-mount packages only.
Quiet output, maximum dynamic V Quiet output, minimum dynamic V Quiet output, minimum dynamic V High-level dynamic input voltage 2 V Low-level dynamic input voltage 0.8 V
= 5 V, CL = 50 pF, TA = 25°C (see Note 5)
CC
CL = 50 pF 1*** 1 ns
OL OL OH
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
TA = 25°C SN54AHCT125 SN74AHCT125
MIN TYP MAX MIN MAX MIN MAX
3.8** 5.5** 1** 6.5** 1 6.5
3.8** 5.5** 1** 6.5** 1 6.5
3.6** 5.1** 1** 6** 1 6
3.6** 5.1** 1** 6** 1 6
4.6** 6.8** 1** 8** 1 8
4.6** 6.8** 1** 8** 1 8
5.3 7.5 1 8.5 1 8.5
5.3 7.5 1 8.5 1 8.5
5.1 7.1 1 8 1 8
5.1 7.1 1 8 1 8
6.1 8.8 1 10 1 10
6.1 8.8 1 10 1 10
SN74AHCT125
MIN MAX
4.4 V
0.8 V
–0.8 V
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN54AHCT125, SN74AHCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS264O – DECEMBER 1995 – REVISED JULY 2003
operating characteristics, V
C
Power dissipation capacitance No load, f = 1 MHz 14 pF
pd
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Input
Test Point
C
L
t
w
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
= 5 V, TA = 25°C
CC
PARAMETER TEST CONDITIONS TYP UNIT
V
CC
Open
GND
Open Drain
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
1.5 V
t
h
Open
V
CC
GND V
CC
From Output
Under Test
C
(see Note A)
L
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
RL = 1 k
3 V
0 V
S1
Timing Input
Data Input
3 V
0 V
3 V
0 V
Input
t
PLH
In-Phase
Output
t
PHL
Out-of-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 Ω, tr 3 ns, tf 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices.
50% V
50% V
CC
CC
Figure 1. Load Circuit and Voltage Waveforms
t
PHL
50% V
t
PLH
50% V
CC
CC
3 V
0 V
V
V
V
V
OH
OL
OH
OL
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Waveform 2
(see Note B)
CC
Output
S1 at GND
1.5 V 1.5 V1.5 V 1.5 V
t
PZL
50% V
CC
t
PZH
50% V
CC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
3 V
0 V
V
V
OL
V
OH
0 V
CC
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable Device Status
5962-9686901Q2A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 5962-9686901QCA ACTIVE CDIP J 14 1 TBD Call TI Level-NC-NC-NC 5962-9686901QDA ACTIVE CFP W 14 1 TBD Call TI Level-NC-NC-NC
SN74AHCT125D ACTIVE SOIC D 14 50 Green(RoHS &
SN74AHCT125DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74AHCT125DBR ACTIVE SSOP DB 14 2000 Green (RoHS &
SN74AHCT125DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &
SN74AHCT125DE4 ACTIVE SOIC D 14 50 Green (RoHS &
SN74AHCT125DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &
SN74AHCT125DGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
SN74AHCT125DR ACTIVE SOIC D 14 2500 Green (RoHS &
SN74AHCT125DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
SN74AHCT125N ACTIVE PDIP N 14 25 Pb-Free
SN74AHCT125NE4 ACTIVE PDIP N 14 25 Pb-Free
SN74AHCT125NSR ACTIVE SO NS 14 2000 Green (RoHS &
SN74AHCT125NSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
SN74AHCT125PW ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT125PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT125PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT125PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74AHCT125PWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
SN74AHCT125PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
SN74AHCT125PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
SN74AHCT125RGYR ACTIVE QFN RGY 14 1000 Green (RoHS &
SN74AHCT125RGYRG4 ACTIVE QFN RGY 14 1000 Green (RoHS &
SNJ54AHCT125FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC
SNJ54AHCT125J ACTIVE CDIP J 14 1 TBD Call TI Level-NC-NC-NC
SNJ54AHCT125W ACTIVE CFP W 14 1 TBD Call TI Level-NC-NC-NC
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1YEAR
CU NIPDAU Level-2-260C-1YEAR
24-Oct-2005
(3)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
(1)
The marketing status values are defined as follows:
24-Oct-2005
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
19
20
21
22
23
24
25
12826 27
12
1314151618 17
0.020 (0,51)
0.010 (0,25)
MIN
0.342 (8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307 (7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850 (21,6)
1.047 (26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358 (9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858 (21,8)
1.063 (27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
24
112
A
0,23 0,13
13
0,07
4,50 4,30
M
6,60 6,20
0,16 NOM
Gage Plane
0,25
0°8°
0,75 0,50
1,20 MAX
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
0,15 0,05
14
3,70
3,50
Seating Plane
3,50
20
5,10
4,90
0,08
5,103,70
4,90
382416
7,90
7,70
48
9,80
9,60
56
11,40
11,20
4073251/E 08/00
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,65
28
1
2,00 MAX
0,38 0,22
15
14
A
0,05 MIN
0,15
5,60 5,00
M
8,20 7,40
Seating Plane
0,10
0,25 0,09
0°ā8°
Gage Plane
0,25
0,95 0,55
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150
14
6,50
6,50
5,905,90
2016
7,50
6,90
24
8,50
28
10,50
9,907,90
30
10,50
9,90
38
12,90
12,30
4040065 /E 12/01
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
1,20 MAX
14
0,30 0,19
8
4,50 4,30
PINS **
7
Seating Plane
0,15 0,05
8
1
A
DIM
14
0,10
6,60 6,20
M
0,10
0,15 NOM
0°–8°
2016
Gage Plane
24
0,25
0,75 0,50
28
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4040064/F 01/97
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