TEXAS INSTRUMENTS SN54AHCT02 Technical data
SOIC
D
AHCT02
TSSOP
PW
HB02
D
Inputs Are TTL-Voltage Compatible
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
SN54AHCT02 ...J OR W PACKAGE
SN74AHCT02 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
1Y
1
1A
2
3
1B
4
2Y
5
2A
6
2B
GND
7
14
13
12
11
10
V
CC
4Y
4B
4A
3Y
9
3B
8
3A
description/ordering information
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74AHCT02 . . . RGY PACKAGE
1A
1B
2Y
2A
2B
(TOP VIEW)
1Y
114
2
3
4
5
6
78
GND
CC
V
3A
13
12
11
10
4Y
4B
4A
3Y
9
3B
SN54AHCT02, SN74AHCT02
SCLS262L – DECEMBER 1995 – REVISED JUL Y 2003
SN54AHCT02 . . . FK PACKAGE
1B
NC
2Y
NC
2A
NC – No internal connection
(TOP VIEW)
1A1YNC
3212019
4
5
6
7
8
910111213
2B
NC
GND
CC
V
3A
18
17
16
15
14
4Y
4B
NC
4A
NC
3Y
3B
These devices contain four independent 2-input NOR gates that perform the Boolean function
Y = A
S
B or Y = A + B in positive logic.
ORDERING INFORMA TION
T
A
QFN – RGY Tape and reel SN74AHCT02RGYR HB02
PDIP – N Tube SN74AHCT02N SN74AHCT02N
–40°C to 85°C
–55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
SOP – NS Tape and reel SN74AHCT02NSR AHCT02
SSOP – DB Tape and reel SN74AHCT02DBR HB02
TVSOP – DGV Tape and reel SN74AHCT02DGVR HB02
CDIP – J Tube SNJ54AHCT02J SNJ54AHCT02J
CFP – W Tube SNJ54AHCT02W SNJ54AHCT02W
LCCC – FK Tube SNJ54AHCT02FK SNJ54AHCT02FK
PACKAGE
–
–
†
Tube SN74AHCT02D
Tape and reel SN74AHCT02DR
Tube SN74AHCT02PW
Tape and reel SN74AHCT02PWR
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
SN54AHCT02, SN74AHCT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCLS262L – DECEMBER 1995 – REVISED JULY 2003
FUNCTION TABLE
(each gate)
INPUTS
A B
H X L
X HL
L L H
logic diagram (positive logic)
OUTPUT
Y
2
1A
3
1B
5
2A
6
2B
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
1
1Y
4
2Y
3A
3B
4A
4B
8
9
11
12
10
13
3Y
4Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
(VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
(VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
(see Note 2): DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package 47°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
PARAMETER
TEST CONDITIONS
V
UNIT
V
4.5 V
V
V
4.5 V
V
PARAMETER
UNIT
A or B
Y
C
15 pF
ns
A or B
Y
C
50 pF
ns
SN54AHCT02, SN74AHCT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCLS262L – DECEMBER 1995 – REVISED JULY 2003
recommended operating conditions (see Note 4)
SN54AHCT02 SN74AHCT02
MIN MAX MIN MAX
V
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 20 20 ns/V
T
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
†
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
Supply voltage 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
High-level output current –8 –8 mA
Low-level output current 8 8 mA
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
TA = 25°C SN54AHCT02 SN74AHCT02
MIN TYP MAX MIN MAX MIN MAX
4.4 4.5 4.4 4.4
3.94 3.8 3.8
0.1 0.1 0.1
0.36 0.44 0.44
I
I
∆I
C
OH
OL
I
CC
i
CC
CC
IOH = –50 mA
IOH = –8 mA
IOL = 50 mA
IOL = 8 mA
VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1
VI = VCC or GND, IO = 0 5.5 V 2 20 20
One input at 3.4 V ,
†
Other inputs at GND or V
VI = VCC or GND 5 V 4 10 10 pF
CC
5.5 V 1.35 1.5 1.5 mA
CC
0 V
CC
V
m
A
m
A
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PLH
t
PHL
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
p
=
L
p
=
L
TA = 25°C SN54AHCT02 SN74AHCT02
MIN TYP MAX MIN MAX MIN MAX
2.4** 5.5** 1** 6.5** 1 6.5
3.5** 5.5** 1** 6.5** 1 6.5
3.4 7.5 1 8.5 1 8.5
4.5 7.5 1 8.5 1 8.5
3
SN54AHCT02, SN74AHCT02
PARAMETER
UNIT
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCLS262L – DECEMBER 1995 – REVISED JULY 2003
noise characteristics, V
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
NOTE 5: Characteristics are for surface-mount packages only.
Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage 2 V
Low-level dynamic input voltage 0.8 V
operating characteristics, V
C
Power dissipation capacitance No load, f = 1 MHz 17 pF
pd
= 5 V, CL = 50 pF, TA = 25°C (see Note 5)
CC
OL
OL
OH
= 5 V, TA = 25°C
CC
PARAMETER TEST CONDITIONS TYP UNIT
SN74AHCT02
MIN TYP MAX
0.8 V
–0.8 V
4.7 V
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
(see Note A)
SN54AHCT02, SN74AHCT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCLS262L – DECEMBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
Test
Point
C
L
From Output
Under Test
(see Note A)
C
L
RL = 1 kΩ
S1
CC
Open
GND
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open Drain
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
t
w
Input
Input
In-Phase
Output
Out-of-Phase
Output
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
50% V
t
PHL
50% V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
3-STATE AND OPEN-DRAIN OUTPUTS
CC
CC
LOAD CIRCUIT FOR
3 V
0 V
3 V
0 V
t
PHL
V
t
PLH
CC
V
V
CC
V
OH
OL
OH
OL
50% V
50% V
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Waveform 2
(see Note B)
CC
Output
S1 at GND
1.5 V
t
CC
CC
h
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V 1.5 V1.5 V 1.5 V
t
PZL
50% V
t
PZH
50% V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
3 V
0 V
3 V
0 V
3 V
0 V
≈V
V
OL
V
OH
≈0 V
CC
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
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performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Low Power www.ti.com/lpw Telephony www.ti.com/telephony
Wireless
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable Device Status
5962-9757101Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9757101QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
5962-9757101QDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
SN74AHCT02D ACTIVE SOIC D 14 50 Green (RoHS &
SN74AHCT02DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74AHCT02DBR ACTIVE SSOP DB 14 2000 Green (RoHS &
SN74AHCT02DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &
SN74AHCT02DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &
SN74AHCT02DE4 ACTIVE SOIC D 14 50 Green (RoHS &
SN74AHCT02DG4 ACTIVE SOIC D 14 50 Green (RoHS &
SN74AHCT02DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &
SN74AHCT02DGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
SN74AHCT02DGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
SN74AHCT02DR ACTIVE SOIC D 14 2500 Green (RoHS &
SN74AHCT02DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
SN74AHCT02DRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
SN74AHCT02N ACTIVE PDIP N 14 25 Pb-Free
SN74AHCT02NE4 ACTIVE PDIP N 14 25 Pb-Free
SN74AHCT02NSR ACTIVE SO NS 14 2000 Green (RoHS &
SN74AHCT02NSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
SN74AHCT02NSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
SN74AHCT02PW ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT02PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT02PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
SN74AHCT02PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74AHCT02PWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
SN74AHCT02PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
9-Oct-2007
(3)
Addendum-Page 1
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