TEXAS INSTRUMENTS SN54AHC86 Technical data

SOIC

D

AHC86

TSSOP

PW

HA86

D

Operating Range 2-V to 5.5-V V

D

Latch-Up Performance Exceeds 250 mA Per
JESD 17

CC

SN54AHC86, SN74AHC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JUL Y 2003

D

ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

SN54AHC86 ...J OR W PACKAGE
SN74AHC86 . . . D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

1A

1

1B

2

1Y

3

2A

4

2B

5

2Y

6

GND

7

14
13
12
11
10

V

CC

4B
4A
4Y
3B
3A

9

3Y

8

SN74AHC86 . . . RGY PACKAGE

1B
1Y
2A
2B
2Y

(TOP VIEW)

1A

114
2
3
4
5
6

78

V

CC

13
12
11
10

4B
4A
4Y
3B

9

3A

3Y

GND

SN54AHC86 . . . FK PACKAGE

1Y

NC

2A

NC

2B

NC – No internal connection

(TOP VIEW)

1B1ANC

3212019

4
5
6
7
8

910111213

2Y

NC

GND

CC

V

3Y

description/ordering information

The ’AHC86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function
Y = A ⊕ B or Y = A

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.

–40°C to 85°C

–55°C to 125°C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.

B + AB in positive logic.

T

A

QFN – RGY Tape and reel SN74AHC86RGYR HA86
PDIP – N Tube SN74AHC86N SN74AHC86N

–

SOP – NS Tape and reel SN74AHC86NSR AHC86
SSOP – DB Tape and reel SN74AHC86DBR HA86

–

TVSOP – DGV Tape and reel SN74AHC86DGVR HA86
CDIP – J Tube SNJ54AHC86J SNJ54AHC86J
CFP – W Tube SNJ54AHC86W SNJ54AHC86W
LCCC – FK Tube SNJ54AHC86FK SNJ54AHC86FK

ORDERING INFORMATION

PACKAGE

†

Tube SN74AHC86D
Tape and reel SN74AHC86DR

Tube SN74AHC86PW
Tape and reel SN74AHC86PWR

ORDERABLE

PART NUMBER

TOP-SIDE
MARKING

4B

18
17
16
15
14

3A

4A
NC
4Y
NC
3B

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2003, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

1

SN54AHC86, SN74AHC86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

FUNCTION TABLE

(each gate)

INPUTS

A B

L L L

L HH
H LH
H H L

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative
logic symbols.

EXCLUSIVE OR

= 1

These are five equivalent exclusive-OR symbols valid for an SN74AHC86 gate in positive logic; negation may be shown at any two ports.

OUTPUT

Y

LOGIC-IDENTITY ELEMENT EVEN-PARITY ELEMENT ODD-PARITY ELEMENT

= 2k 2k + 1

The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).

The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.

The output is active (high) if
an odd number of inputs
(i.e., only 1 of the 2) are
active.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

3. The package thermal impedance is calculated in accordance with JESD 51-5.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

OK

< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

O

or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

(see Note 2): DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 3): RGY package 47°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

†

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

mA

mA

∆t/∆v

Input transition rise or fall rate

ns/V

PARAMETER

TEST CONDITIONS

V

UNIT

OH

OL

SN54AHC86, SN74AHC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

recommended operating conditions (see Note 4)

SN54AHC86 SN74AHC86

MIN MAX MIN MAX

V

V

V

V
V

I

OH

I

OL

T

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 2 5.5 2 5.5 V

CC

VCC = 2 V 1.5 1.5

High-level input voltage

IH

Low-level input voltage

IL

Input voltage 0 5.5 0 5.5 V

I

Output voltage 0 V

O

High-level output current

Low-level output current

p

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

VCC = 3 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VCC = 3 V
VCC = 5.5 V 1.65 1.65

VCC = 2 V –50 –50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V –8 –8
VCC = 2 V 50 50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 8 8
VCC = 3.3 V ± 0.3 V 100 100
VCC = 5 V ± 0.5 V 20 20

2.1 2.1

0.9 0.9

CC

–4 –4

4 4

0 V

CC

V

V

V

m

A

m

A

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

CC

2 V 1.9 2 1.9 1.9

IOH = –50 mA

V

OH

IOH = –4 mA
IOH = –8 mA

IOL = 50 mA

V

OL

IOL = 4 mA
IOL = 8 mA

I

I

I

CC

C

i

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.

VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1
VI = VCC or GND, IO = 0 5.5 V 2 20 20
VI = VCC or GND 5 V 4 10 10 pF

3 V 2.9 3 2.9 2.9

4.5 V 4.4 4.5 4.4 4.4
3 V 2.58 2.48 2.48

4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
3 V 0.1 0.1 0.1

4.5 V 0.1 0.1 0.1
3 V 0.36 0.5 0.44

4.5 V 0.36 0.5 0.44

TA = 25°C SN54AHC86 SN74AHC86

MIN TYP MAX MIN MAX MIN MAX

V

V

m

A

m

A

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN54AHC86, SN74AHC86

PARAMETER

UNIT

A or B

Y

C

15 pF

ns

A or B

Y

C

50 pF

ns

PARAMETER

UNIT

A or B

Y

C

15 pF

ns

A or B

Y

C

50 pF

ns

PARAMETER

UNIT

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

switching characteristics over recommended operating free-air temperature range,
V

= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)

CC

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

t

PLH

t

PHL

t

PLH

t

PHL

* On products compliant to MIL-PRF-38535, this parameter is not production tested.

p

=

L

p

=

L

switching characteristics over recommended operating free-air temperature range,
V

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

CC

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

t

PLH

t

PHL

t

PLH

t

PHL

* On products compliant to MIL-PRF-38535, this parameter is not production tested.

p

=

L

p

=

L

TA = 25°C SN54AHC86 SN74AHC86

MIN TYP MAX MIN MAX MIN MAX

7* 11* 1* 13* 1 13
7* 11* 1* 13* 1 13

9.5 14.5 1 16.5 1 16.5

9.5 14.5 1 16.5 1 16.5

TA = 25°C SN54AHC86 SN74AHC86

MIN TYP MAX MIN MAX MIN MAX

4.8* 6.8* 1* 8* 1 8

4.8* 6.8* 1* 8* 1 8

6.3 8.8 1 10 1 10

6.3 8.8 1 10 1 10

noise characteristics, V

V

OL(P)

V

OL(V)

V

OH(V)

V

IH(D)

V

IL(D)

NOTE 5: Characteristics are for surface-mount packages only.

Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage 3.5 V
Low-level dynamic input voltage 1.5 V

operating characteristics, V

C

Power dissipation capacitance No load, f = 1 MHz 18 pF

pd

= 5 V, CL = 50 pF, TA = 25°C (see Note 5)

CC

OL
OL
OH

= 5 V, TA = 25°C

CC

PARAMETER TEST CONDITIONS TYP UNIT

SN74AHC86

MIN TYP MAX

0.3 0.8 V

–0.3 –0.8 V

4.4 V

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

From Output

Under Test

(see Note A)

SN54AHC86, SN74AHC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

V

Test
Point

C

L

From Output

Under Test

(see Note A)

C

L

RL = 1 kΩ

S1

CC

Open

GND

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open Drain

Open

V

CC

GND
V

CC

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Input

Input

t

PLH

In-Phase

Output

t

PHL

Out-of-Phase

Output

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

t

w

50% V

CC

VOLTAGE WAVEFORMS

PULSE DURATION

50% V

CC

50% V

50% V

VOLTAGE WAVEFORMS

50% V

CC

CC

3-STATE AND OPEN-DRAIN OUTPUTS

50% V

LOAD CIRCUIT FOR

V

CC

CC

0 V

V

CC

CC

t

PHL

50% V

t

PLH

50% V

CC

CC

0 V

V

V

V

V

OH

OL

OH

OL

Timing Input

Data Input

Output

Control

Output

Waveform 1

S1 at V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

50% V

t

su

50% V

CC

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

50% V

CC

t

PZL

50% V

50% V

CC

CC

CC

t

PZH

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

CC

t

50% V

50% V

h

CC

CC

t

PLZ

VOL + 0.3 V

t

PHZ

VOH – 0.3 V

V

CC

0 V

V

CC

0 V

V

CC

0 V

≈V

V

OL

V

OH

≈0 V

CC

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.

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Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
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Microcontrollers microcontroller.ti.com Security www.ti.com/security
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Wireless

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Wireless www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2007, Texas Instruments Incorporated

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

5962-9681601Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9681601QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
5962-9681601QDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type

SN74AHC86D ACTIVE SOIC D 14 50 Green (RoHS &

SN74AHC86DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI

SN74AHC86DBR ACTIVE SSOP DB 14 2000 Green(RoHS &

SN74AHC86DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &

SN74AHC86DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &

SN74AHC86DE4 ACTIVE SOIC D 14 50 Green (RoHS &

SN74AHC86DG4 ACTIVE SOIC D 14 50 Green (RoHS &

SN74AHC86DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &

SN74AHC86DGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &

SN74AHC86DGVRG4 ACTIVE TVSOP DGV 14 2000 Green(RoHS &

SN74AHC86DR ACTIVE SOIC D 14 2500 Green (RoHS &

SN74AHC86DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &

SN74AHC86DRG4 ACTIVE SOIC D 14 2500 Green (RoHS &

SN74AHC86N ACTIVE PDIP N 14 25 Pb-Free

SN74AHC86NE4 ACTIVE PDIP N 14 25 Pb-Free

SN74AHC86NSR ACTIVE SO NS 14 2000 Green (RoHS &

SN74AHC86NSRE4 ACTIVE SO NS 14 2000 Green (RoHS &

SN74AHC86NSRG4 ACTIVE SO NS 14 2000 Green (RoHS &

SN74AHC86PW ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHC86PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHC86PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &

SN74AHC86PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI

SN74AHC86PWR ACTIVE TSSOP PW 14 2000 Green (RoHS &

SN74AHC86PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

no Sb/Br)

(RoHS)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU N / A for Pkg Type

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

9-Oct-2007

(3)

Addendum-Page 1