TEXAS INSTRUMENTS SN54AHC574 Technical data

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SOIC

AHC574

40°C to 85°C

TSSOP

HA574

查询5962-9685401Q2A供应商

Operating Range 2-V to 5.5-V V

3-State Outputs Drive Bus Lines Directly

Latch-Up Performance Exceeds 250 mA Per JESD 17

SN74AHC574 . . . DB, DGV, DW, N, NS, OR PW PACKAGE

SN54AHC574 ...J OR W PACKAGE

(TOP VIEW)

1D 2D 3D 4D 5D 6D 7D 8D

GND

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK

SN54AHC574, SN74AHC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JUL Y 2003

ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)

SN54AHC574 . . . FK PACKAGE

3D 4D 5D 6D 7D

(TOP VIEW)

2D1DOE

3212019

4 5 6 7 8

910111213

GND

CLK

18 17 16 15 14

7Q 1Q

2Q 3Q 4Q 5Q 6Q

description/ordering information

The ’AHC574 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low) or the

high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly . The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

ORDERING INFORMA TION

PDIP – N Tube SN74AHC574N SN74AHC574N

–

–55°C to 125°C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

SOP – NS Tape and reel SN74AHC574NSR AHC574

SSOP – DB Tape and reel SN74AHC574DBR HA574

TVSOP – DGV Tape and reel SN74AHC574DGVR HA574 CDIP – J Tube SNJ54AHC574J SNJ54AHC574J CFP – W Tube SNJ54AHC574W SNJ54AHC574W LCCC – FK Tube SNJ54AHC574FK SNJ54AHC574FK

PACKAGE

–

†

Tube SN74AHC574DW Tape and reel SN74AHC574DWR

Tube SN74AHC574PW Tape and reel SN74AHC574PWR

ORDERABLE

PART NUMBER

TOP-SIDE MARKING

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN54AHC574, SN74AHC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JULY 2003

description/ordering information (continued)

OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

T o ensure the high-impedance state during power up or power down, OE

should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

FUNCTION TABLE

(each flip-flop)

INPUTS

OE CLK D

L ↑ H H L ↑ LL L H or L X Q

H X X Z

OUTPUT

logic diagram (positive logic)

CLK

To Seven Other Channels

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Input voltage range, V Output voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 1) –0.5 V to V

< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

∆t/∆v

Input transition rise or fall rate

ns/V

PARAMETER

TEST CONDITIONS

UNIT

SN54AHC574, SN74AHC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JULY 2003

recommended operating conditions (see Note 3)

SN54AHC574 SN74AHC574

MIN MAX MIN MAX

V V

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 2 5.5 2 5.5 V

VCC = 2 V 1.5 1.5

High-level input voltage

Low-level input voltage

Input voltage 0 5.5 0 5.5 V

Output voltage 0 V

High-level output current

Low-level output current

Operating free-air temperature –55 125 –40 85 °C

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

VCC = 3 V VCC = 5.5 V 3.85 3.85 VCC = 2 V 0.5 0.5 VCC = 3 V VCC = 5.5 V 1.65 1.65

VCC = 2 V –50 –50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V –8 –8 VCC = 2 V 50 50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 8 8 VCC = 3.3 V ± 0.3 V 100 100 VCC = 5 V ± 0.5 V 20 20

2.1 2.1

0.9 0.9

–4 –4

4 4

0 V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

2 V 1.9 2 1.9 1.9

IOH = –50 mA

IOH = –4 mA IOH = –8 mA

IOL = 50 mA

IOL = 4 mA IOL = 8 mA

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.

VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1 VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5 VI = VCC or GND, IO = 0 5.5 V 4 40 40 VI = VCC or GND 5 V 3 10 10 pF VO = VCC or GND 5 V 3 pF

3 V 2.9 3 2.9 2.9

4.5 V 4.4 4.5 4.4 4.4 3 V 2.58 2.48 2.48

4.5 V 3.94 3.8 3.8 2 V 0.1 0.1 0.1 3 V 0.1 0.1 0.1

4.5 V 0.1 0.1 0.1 3 V 0.36 0.5 0.44

4.5 V 0.36 0.5 0.44

TA = 25°C SN54AHC574 SN74AHC574

MIN TYP MAX MIN MAX MIN MAX

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AHC574, SN74AHC574

UNIT

PARAMETER

UNIT

MHz

CLK

15 pF

CLK

50 pF

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JULY 2003

timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)

TA = 25°C SN54AHC574 SN74AHC574 MIN MAX MIN MAX MIN MAX

Pulse duration, CLK high or low 5 5 5 ns

Setup time, data before CLK↑

Hold time, data after CLK↑ 1.5 1.5 1.5 ns

timing requirements over recommended operating free-air temperature range,

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

Pulse duration, CLK high or low 5 5 5 ns

Setup time, data before CLK↑

Hold time, data after CLK↑ 1.5 1.5 1.5 ns

switching characteristics over recommended operating free-air temperature range, V

= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

max

PLH

PHL

PZH

PZL

PHZ

PLZ

PLH

PHL

PZH

PZL

PHZ

PLZ

sk(o)

∗

On products compliant to MIL-PRF-38535, this parameter is not production tested.

∗∗

On products compliant to MIL-PRF-38535, this parameter does not apply.

CL = 15 pF 80* 125* 65* 65 CL = 50 pF 50 75 45 45

CL = 50 pF 1.5** 1.5 ns

MIN TYP MAX MIN MAX MIN MAX

3.5 3.5 3.5 ns

TA = 25°C SN54AHC574 SN74AHC574 MIN MAX MIN MAX MIN MAX

3 3 3 ns

TA = 25°C SN54AHC574 SN74AHC574

8.5* 13.2* 1* 15.5* 1 15.5

8.2* 12.8* 1* 15* 1 15

8.5* 13* 1* 15* 1 15

8.5* 13* 1* 15* 1 15 11 16.7 1 19 1 19 11 16.7 1 19 1 19

10.7 16.3 1 18.5 1 18.5

10.7 16.3 1 18.5 1 18.5 11 15 1 17 1 17 11 15 1 17 1 17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

UNIT

MHz

CLK

15 pF

CLK

50 pF

PARAMETER

UNIT

SN54AHC574, SN74AHC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JULY 2003

switching characteristics over recommended operating free-air temperature range, V

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

max

PLH

PHL

PZH

PZL

PHZ

PLZ

PLH

PHL

PZH

PZL

PHZ

PLZ

sk(o)

∗

On products compliant to MIL-PRF-38535, this parameter is not production tested.

∗∗

On products compliant to MIL-PRF-38535, this parameter does not apply.

CL = 15 pF 130* 180* 110* 110 CL = 50 pF 85 115 75 75

CL = 50 pF 1** 1 ns

TA = 25°C SN54AHC574 SN74AHC574

MIN TYP MAX MIN MAX MIN MAX

5.6* 8.6* 1* 10* 1 10

5.9* 9* 1* 10.5* 1 10.5

5.5* 9* 1* 10.5* 1 10.5

7.1 10.6 1 12 1 12

7.4 11 1 12.5 1 12.5

7.1 10.1 1 11.5 1 11.5

noise characteristics, V

OL(P)

OL(V)

OH(V)

IH(D)

IL(D)

NOTE 4: Characteristics are for surface-mount packages only.

Quiet output, maximum dynamic V Quiet output, minimum dynamic V Quiet output, minimum dynamic V High-level dynamic input voltage 3.5 V Low-level dynamic input voltage 1.5 V

operating characteristics, V

Power dissipation capacitance No load, f = 1 MHz 28 pF

= 5 V, CL = 50 pF, TA = 25°C (see Note 4)

OL OL OH

= 5 V, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

SN74AHC574

MIN MAX

0.8 V

–0.8 V

4.2 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AHC574, SN74AHC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SCLS244I – OCTOBER 1995 – REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

(see Note A)

Test Point

From Output

Under Test

(see Note A)

RL = 1 kΩ

GND

Open

TEST S1

PLH/tPHL

PLZ/tPZL

PHZ/tPZH

Open Drain

Open

GND V

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Input

PLH

In-Phase

Output

PHL

Out-of-Phase

Output

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

50% V

VOLTAGE WAVEFORMS

PULSE DURATION

50% V

VOLTAGE WAVEFORMS

50% V

3-STATE AND OPEN-DRAIN OUTPUTS

50% V

LOAD CIRCUIT FOR

0 V

PHL

50% V

PLH

50% V

0 V

Timing Input

Data Input

Output

Control

Output

Waveform 1

S1 at V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

50% V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

50% V

PZL

50% V

PZH

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

50% V

PLZ

VOL + 0.3 V

PHZ

VOH – 0.3 V

0 V

≈V

≈0 V

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

30-Mar-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

5962-9685401Q2A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 5962-9685401QRA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 5962-9685401QSA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC

SN74AHC574DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI

SN74AHC574DBR ACTIVE SSOP DB 20 2000 Pb-Free

SN74AHC574DGVR ACTIVE TVSOP DGV 20 2000 Pb-Free

SN74AHC574DW ACTIVE SOIC DW 20 25 Pb-Free

SN74AHC574DWR ACTIVE SOIC DW 20 2000 Pb-Free

SN74AHC574N ACTIVE PDIP N 20 20 Pb-Free

SN74AHC574NSR ACTIVE SO NS 20 2000 Pb-Free

SN74AHC574PW ACTIVE TSSOP PW 20 70 Pb-Free

SN74AHC574PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI

SN74AHC574PWR ACTIVE TSSOP PW 20 2000 Pb-Free

SNJ54AHC574FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC

SNJ54AHC574J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC

SNJ54AHC574W ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

CU NIPDAU Level-1-250C-UNLIM

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

CU NIPDAU Level-1-250C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

30-Mar-2005

Addendum-Page 2

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A SQ

B SQ

12826 27

1314151618 17

0.020 (0,51)

0.010 (0,25)

MIN

0.342 (8,69)

0.442

0.640

0.739

0.938

1.141

(11,63)

(16,76)

(19,32)(18,78)

(24,43)

(29,59)

0.358 (9,09)

0.458 (10,31)

0.660 (12,58)

0.761 (12,58)

0.962

1.165

NO. OF

TERMINALS

432

0.020 (0,51)

0.010 (0,25)

(11,23)

(16,26)

(23,83)

(28,99)

MINMAX

0.307 (7,80)

0.406

0.495

0.850 (21,6)

1.047 (26,6)

0.080 (2,03)

0.064 (1,63)

MAX

0.358 (9,09)

0.458

(11,63)

0.560

(14,22)

0.560

(14,22)

0.858 (21,8)

1.063 (27,0)

0.055 (1,40)

0.045 (1,14)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

4040140/D 10/96

MECHANICAL DATA

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000

DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,40

112

0,23 0,13

0,07

4,50 4,30

6,60 6,20

0,16 NOM

Gage Plane

0,25

0°–8°

0,75 0,50

1,20 MAX

PINS **

DIM

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153

14/16/20/56 Pins – MO-194

0,15 0,05

3,70

3,50

Seating Plane

3,50

5,10

4,90

0,08

5,103,70

4,90

382416

7,90

7,70

9,80

9,60

11,40

11,20

4073251/E 08/00

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,65

2,00 MAX

0,38 0,22

0,05 MIN

0,15

5,60 5,00

8,20 7,40

Seating Plane

0,10

0,25 0,09

0°–ā8°

Gage Plane

0,25

0,95 0,55

PINS **

DIM

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

6,50

5,905,90

2016

7,50

6,90

8,50

10,50

9,907,90

10,50

9,90

12,90

12,30

4040065 /E 12/01

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65

1,20 MAX

0,30

0,19

4,50 4,30

PINS **

Seating Plane

0,15

0,05

DIM

6,60 6,20

0,10

0,15 NOM

0°–8°

2016

Gage Plane

0,25

0,75 0,50

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

4040064/F 01/97

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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TEXAS INSTRUMENTS SN54AHC574 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual