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SN54ABT540, SN74ABT540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D
T ypical V
(Output Ground Bounce) < 1 V
OLP
at VCC = 5 V, TA = 25°C
D
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Package
description
The ’ABT540 octal buffers and line drivers are
ideal for driving bus lines or buffer memory
address registers. The devices feature inputs and
outputs on opposite sides of the package that
facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1
or OE2) input is high, all corresponding
outputs are in the high-impedance state.
SN54ABT540 ...J OR W PACKAGE
SN74ABT540 . . . DB, DW, N, OR PW PACKAGE
SN54ABT540 . . . FK PACKAGE
A3
A4
A5
A6
A7
(TOP VIEW)
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
9
A8
GND
10
(TOP VIEW)
A2A1OE1
3212019
4
5
6
7
8
910111213
A8
GND
Y8
20
19
18
17
16
15
14
13
12
11
V
CC
Y7
V
CC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
Y6 OE2
Y1
Y2
Y3
Y4
Y5
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT540 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT540 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
OE1 OE2 A
L L L H
L LH L
H XX Z
X H X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
INPUTS
OUTPUT
Y
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABT540, SN74ABT540
UNIT
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997
1
19
2
3
4
5
6
7
8
9
†
&
EN
1
18
17
16
15
14
13
12
11
logic symbol
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
OE1
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
1
19
218
A1
Y1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, V
Current into any output in the low state, IO: SN54ABT540 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT540 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): DB package 115°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
–0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
O
‡
recommended operating conditions (see Note 3)
SN54ABT540 SN74ABT540
MIN MAX MIN MAX
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate Outputs enabled 5 5 ns/V
T
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2
Supply voltage 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 V
I
High-level output current –24 –32 mA
Low-level output current 48 64 mA
Operating free-air temperature –55 125 –40 85 °C
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CC
0 V
CC
V
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
4.5 V
VOLV
V
V
V
I
V
CC
GND
§
,
(INPUT)
(OUTPUT)
A
Y
ns
OE
Y
ns
OE
Y
ns
SN54ABT540, SN74ABT540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54ABT540 SN74ABT540
MIN TYP†MAX MIN MAX MIN MAX
V
IK
OH
V
hys
I
I
I
OZH
I
OZL
I
off
I
CEX
‡
I
O
I
CC
Data
∆I
C
C
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
All typical values are at VCC = 5 V.
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
§
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
inputs
CC
Control
inputs
i
o
VCC = 4.5 V, II = –18 mA –1.2 –1.2 –1.2 V
VCC = 4.5 V, IOH = –3 mA 2.5 2.5 2.5
VCC = 5 V, IOH = –3 mA 3 3 3
=
CC
= 4.5
CC
VCC = 5.5 V, VI = VCC or GND ±1 ±1 ±1 µA
VCC = 5.5 V, VO = 2.7 V 50 50 50 µA
VCC = 5.5 V, VO = 0.5 V –50 –50 –50 µA
VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
VCC = 5.5 V, VO = 5.5 V Outputs high 50 50 50 µA
VCC = 5.5 V, VO = 2.5 V –50 –100 –180 –50 –180 –50 –180 mA
VCC = 5.5 V, IO = 0,
=
or
VCC = 5.5 V,
One input at 3.4 V ,
Other inputs at
VCC or GND
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 2.5 V or 0.5 V 3 pF
VO = 2.5 V or 0.5 V 8 pF
IOH = –24 mA 2 2
IOH = –32 mA 2* 2
IOL = 48 mA 0.55 0.55
IOL = 64 mA 0.55* 0.55
100 mV
Outputs high 1 250 250 250 µA
Outputs low 24 30 30 30 mA
Outputs disabled 0.5 250 250 250 µA
Outputs enabled 1.5 1.5 1.5
Outputs disabled 0.05 0.05 0.05
1.5 1.5 1.5
mA
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
= 50 pF (unless otherwise noted) (see Figure 1)
L
FROM
TO
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VCC = 5 V,
TA = 25°C
MIN TYP MAX MIN MAX MIN MAX
1 2.9 4.1 1 1 4.8
1 3.1 4.3 1 1 4.8
1.1 3.4 4.9 1.1 1.1 5.9
1.1 3 5.8 1.1 1.1 6.4
1.5 5.3 6.8 1.5 1.5 7.3
1.2 4.4 5.7 1.2 1.2 6.2
SN54ABT540 SN74ABT540
UNIT
3
SN54ABT540, SN74ABT540
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997
PARAMETER MEASUREMENT INFORMATION
500 Ω
t
w
1.5 V
500 Ω
1.5 V
1.5 V1.5 V
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
Input
Input
Output
Output
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V 1.5 V
t
PLH
t
PHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
S1
t
PHL
1.5 V
t
PLH
3 V
0 V
V
V
V
V
7 V
GND
OH
OL
OH
OL
Open
3 V
0 V
Timing Input
Data Input
Output
Output
Control
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
t
PZL
t
PLZ
1.5 V
t
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
PHZ
1.5 V
Open
Open
1.5 V
t
7 V
h
1.5 V1.5 V
VOL + 0.3 V
VOH – 0.3 V
3 V
0 V
3 V
0 V
3 V
0 V
3.5 V
V
OL
V
OH
≈ 0 V
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2005
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
SN74ABT540DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI
SN74ABT540DBR ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br)
SN74ABT540DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br)
SN74ABT540DW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br)
SN74ABT540DWE4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br)
SN74ABT540DWR ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br)
SN74ABT540DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br)
SN74ABT540N ACTIVE PDIP N 20 20 Pb-Free
SN74ABT540NE4 ACTIVE PDIP N 20 20 Pb-Free
SN74ABT540NSR ACTIVE SO NS 20 2000 Green (RoHS &
no Sb/Br)
SN74ABT540NSRE4 ACTIVE SO NS 20 2000 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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