TEXAS INSTRUMENTS SN54ABT16245A, SN74ABT16245A Technical data

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SN54ABT16245A. . . WD PACKAGE

SN74ABT16245A. . . DGG, DGV, OR DL PACKAGE

(TOP VIEW)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

1DIR

1B1 1B2

GND

1B3 1B4 V

1B5 1B6

GND

1B7 1B8 2B1 2B2

GND

2B3 2B4 V

2B5 2B6

GND

2B7 2B8

2DIR

1OE 1A1 1A2 GND 1A3 1A4 V

1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V

2A5 2A6 GND 2A7 2A8 2OE

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FEATURES

• Members of the Texas Instruments

Widebus™ Family

• State-of-the-Art EPIC-IIB™ BiCMOS Design

Significantly Reduces Power Dissipation

• Typical V

= 5 V, T

• High-Impedance State During Power Up and

Power Down

• Distributed V

Minimizes High-Speed Switching Noise

• Flow-Through Architecture Optimizes PCB

Layout

• High-Drive Outputs (–32-mA IOH, 64-mA IOL)

• Latch-Up Performance Exceeds 500 mA Per

JESD 70

• ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

• Package Options Includes Plastic Thin Very

Small-Outline (DGV), Shrink Small-Outline (DL), and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic (WD) Flat Package Using 25-mil Center-to-Center Spacings

(Output Ground Bounce) <1 V at

OLP

= 25 ° C

and GND Pin Configuration

SN54ABT16245A, SN74ABT16245A

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS300F – MARCH 1994 – REVISED JULY 2005

DESCRIPTION

The 'ABT16245A devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

These devices can be used as two 8-bit transceviers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated.

When V However, to ensure the high-impendance state above 2.1 V, OE should be tied to V the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT16245A is characterized for operation over the full military temperature range of –55 ° C to 125 ° C. The SN74ABT16245A is characterized for operation from –40 ° C to 85 ° C.

Widebus, EPIC-IIB are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

through a pullup resistor;

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

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1A2

1A3

1A4

1A5

1A6

1A7

1A8

2A2

2A3

2A4

2A5

2A6

2A7

2A8

1OE

2OE

1A1

3 EN1 [BA]

1DIR

3 EN2 [AB] G6

6 EN4 [BA]

2DIR

6 EN5 [AB]

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1B8

2A1

2B1

2B2

2B3

2B4

2B5

2B6

2B7

2B8

SN54ABT16245A, SN74ABT16245A 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS300F – MARCH 1994 – REVISED JULY 2005

FUNCTION TABLE

(EACH 8-BIT SECTION)

INPUTS

OE DIR

L L B data to A bus L H A data to B bus

H X Isolation

OPERATION

LOGIC SYMBOL

(1)

(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

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To Seven Other Channels

1DIR

1A1

1B1

1OE

To Seven Other Channels

2DIR

2A1

2B1

2OE

LOGIC DIAGRAM (POSITIVE LOGIC)

SN54ABT16245A, SN74ABT16245A

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCBS300F – MARCH 1994 – REVISED JULY 2005

Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V V V

I I

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD 51.

Supply voltage range –0.5 7 V

Input voltage range (except I/O ports)

Voltage range applied to any output in the high or power-off state –0.5 5.5 V

Current into any output in the low state mA

Input clamp current VI< 0 –18 mA

Output clamp current VO< 0 –50 mA

(2)

SN54ABT16245A 96 SN74ABT16245A 128

DGG package 89

Package thermal impedance

(3)

DGV package 93 ° C/W DL package 94

Storage temperature range –65 150 ° C

stg

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability

–0.5 7 V

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SN54ABT16245A, SN74ABT16245A 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS300F – MARCH 1994 – REVISED JULY 2005

Recommended Operating Conditions

V V V V I

∆ t/ ∆ v Input transition rise or fall rate Outputs enabled 10 10 ns/V ∆ t/ ∆ V

(1) All unused inputs of the device must be held at V

Supply voltage 4.5 5.5 4.5 5.5 V

High-level input voltage 2 2 V

Low-level input voltage 0.8 0.8 V

Input voltage 0 V

High-level output current –24 –32 mA Low-level output current 48 64 mA

Power-up ramp rate 200 200 µ s/V

Operating free-air temperature –55 125 –40 85 ° C

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(1)

SN54ABT16245A SN74ABT16245A

MIN MAX MIN MAX

or GND to ensure proper device operation. Refer to the TI application report,

0 V

UNIT

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