Each circuit functions as an inverter, but because
of the Schmitt action, it has different input
threshold levels for positive-going (V
negative-going (V
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean, jitter-free output signals.
) signals.
T–
T+
) and
SN5414, SN54LS14 ...J OR W PACKAGE
SN7414 . . . D, N, OR NS PACKAGE
SN74LS14 . . . D, DB, OR N PACKAGE
SN54LS14 . . . FK PACKAGE
2A
NC
2Y
NC
3A
(TOP VIEW)
1A
1
1Y
2
2A
3
2Y
4
3A
5
3Y
6
GND
7
(TOP VIEW)
1Y1ANC
3212019
4
5
6
7
8
910111213
14
13
12
11
10
V
CC
6A
6Y
5A
5Y
4A
9
4Y
8
CC
6A
V
6Y
18
NC
17
5A
16
NC
15
5Y
14
4Y
NC
4A
3Y
GND
NC – No internal connection
ORDERING INFORMA TION
T
A
SOP – NSTape and reelSN7414NSRSN7414
SSOP – DBTape and reelSN74LS14DBRLS14
–55°C to 125°C
LCCC – FKTubeSNJ54LS14FKSNJ54LS14FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
PACKAGE
–
–
–
–
†
TubeSN7414NSN7414N
TubeSN74LS14NSN74LS14N
TubeSN7414D
Tape and reelSN7414DR
TubeSN74LS14D
Tape and reelSN74LS14DR
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package termal impedance is calculated in accordance with JESD 51-7
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω; tr and tf ≤ 7 ns for Series
54/74 devices and tr and tf ≤ 2.5 ns for Series 54S/74S devices.
F. The outputs are measured one at a time with one input transition per measurement.
1.5 V1.5 V
t
w
1.5 V1.5 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V1.5 V
1.5 V1.5 V
1.5 V1.5 V
VOLTAGE WAVEFORMS
, t
PLH
PHL
t
PHL
t
PLH
, t
FOR OPEN-COLLECTOR OUTPUTS
PHZ
LOAD CIRCUIT
3 V
0 V
V
OH
V
OL
V
OH
V
OL
, and t
PLZ
Timing
Input
Data
Input
Output
Control
(low-level
enabling)
t
PZL
Waveform 1
(see Notes C
and D)
t
PZH
Waveform 2
(see Notes C
and D)
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
; S1 is open and S2 is closed for t
FOR 3-STATE OUTPUTS
1.5 V
t
su
1.5 V1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
; S1 is closed and S2 is open for t
PZH
LOAD CIRCUIT
3 V
0 V
t
h
3 V
0 V
t
PLZ
V
t
PHZ
V
3 V
0 V
≈1.5 V
VOL + 0.5 V
OL
OH
VOH – 0.5 V
≈1.5 V
PZL
.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
(see Note A)
Test
Point
C
L
HEX SCHMITT-TRIGGER INVERTERS
SDLS049B – DECEMBER 1983 – REVISED FEBRUARY 2002
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
V
CC
V
CC
R
L
R
(see Note B)
From Output
Under Test
(see Note A)
C
L
L
Test
Point
V
CC
From Output
Under Test
(see Note A)
SN5414, SN54LS14,
SN7414, SN74LS14
Test
R
Point
C
L
L
5 kΩ
S1
(see Note B)
S2
FOR 2-STATE TOTEM-POLE OUTPUTS
High-Level
Low-Level
In-Phase
(see Note D)
Out-of-Phase
(see Note D)
NOTES: A. CL includes probe and jig capacitance.
LOAD CIRCUIT
Pulse
Pulse
Input
t
PLH
Output
t
PHL
Output
PROPAGATION DELAY TIMES
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns.
G. The outputs are measured one at a time with one input transition per measurement.
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-NC-NC-NC
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-2-260C-1 YEAR/
CU NIPDAULevel-NC-NC-NC
CU NIPDAULevel-1-260C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
Level-1-235C-UNLIM
(3)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
3-Jun-2005
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
19
20
21
22
23
24
25
1282627
12
131415161817
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358
(9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858
(21,8)
1.063
(27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,65
28
1
2,00 MAX
0,38
0,22
15
14
A
0,05 MIN
0,15
5,60
5,00
M
8,20
7,40
Seating Plane
0,10
0,25
0,09
0°–ā8°
Gage Plane
0,25
0,95
0,55
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
14
6,50
6,50
5,905,90
2016
7,50
6,90
24
8,50
28
10,50
9,907,90
30
10,50
9,90
38
12,90
12,30
4040065 /E 12/01
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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