查询SN5404J供应商
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
D
Dependable Texas Instruments Quality and
Reliability
description
These devices contain six independent inverters.
SN5404 . . . J PACKAGE
SN54LS04, SN54S04 . . . J OR W PACKAGE
SN7404 . . . D, N, OR NS PACKAGE
SN74LS04 . . . D, DB, N, OR NS PACKAGE
SN74S04 . . . D OR N PACKAGE
(TOP VIEW)
1A
1
1Y
2
2A
3
2Y
4
3A
5
3Y
6
GND
7
SN5404 . . . W PACKAGE
(TOP VIEW)
1A
1
2Y
2
2A
3
V
4
CC
3A
5
3Y
6
4A
7
14
13
12
11
10
14
13
12
11
10
V
CC
6A
6Y
5A
5Y
4A
9
4Y
8
1Y
6A
6Y
GND
5Y
5A
9
4Y
8
SN54LS04, SN54S04 . . . FK PACKAGE
(TOP VIEW)
GND
NC
CC
V
4Y
6A
18
17
16
15
14
4A
6Y
NC
5A
NC
5Y
1Y1ANC
2A
NC
2Y
NC
3A
3 2 1 20 19
4
5
6
7
8
910111213
3Y
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
SN5404, SN54LS04, SN54S04,
LS04
S04
SOP
NS
CDIP
J
LCCC
FK
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
T
A
PDIP – N
0°C to 70°C SOIC – D
SSOP – DB Tape and reel SN74LS04DBR LS04
–55°C to 125°C
CFP – W
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
PACKAGE
–
–
–
ORDERING INFORMATION
†
Tube SN7404N SN7404N
Tube SN74LS04N SN74LS04N
Tube SN74S04N SN74S04N
Tube SN7404D 7404
Tube SN74LS04D
Tape and reel SN74LS04DR
Tube SN74S04D
Tape and reel SN74S04DR
Tape and reel SN7404NSR SN7404
Tape and reel SN74LS04NSR 74LS04
Tube SN5404J SN5404J
Tube SNJ5404J SNJ5404J
Tube SN54LS04J SN54LS04J
Tube SN54S04J SN54S04J
Tube SNJ54LS04J SNJ54LS04J
Tube SNJ54S04J SNJ54S04J
Tube SNJ5404W SNJ5404W
Tube SNJ54LS04W SNJ54LS04W
Tube SNJ54S04W SNJ54S04W
Tube SNJ54LS04FK SNJ54LS04FK
Tube SNJ54S04FK SNJ54S04FK
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
FUNCTION TABLE
(each inverter)
INPUT
A
H L
L H
OUTPUT
Y
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
1A
2A
3A
4A
5A
6A
Y = A
1Y
2Y
3Y
4Y
5Y
6Y
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
schematics (each gate)
’04
V
CC
4 kΩ
Input A
’LS04
20 kΩ 120 Ω
8 kΩ
2.8 kΩ
130 Ω
GND
Output Y
’S04
900 Ω
50 Ω
V
CC
1.6 kΩ
1 kΩ
V
CC
Input
A
12 kΩ
1.5 kΩ
Resistor values shown are nominal.
4 kΩ
3 kΩ
Output
Y
GND
Input
A
500 Ω
3.5 kΩ
250 Ω
Output
Y
GND
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN5404
SN7404
UNIT
PARAMETER
TEST CONDITIONS
‡
UNIT
(INPUT)
(OUTPUT)
A
Y
R
L
400 Ω
C
L
F
ns
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. This are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
: ’04, ’S04 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
’LS04 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions
MIN NOM MAX MIN NOM MAX
V
V
V
I
I
T
CC
IH
IL
OH
OL
A
Supply voltage 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –0.4 –0.4 mA
Low-level output current 16 16 mA
Operating free-air temperature –55 125 0 70 °C
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN5404 SN7404
MIN TYP§MAX MIN TYP§MAX
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
¶
I
OS
I
CCH
I
‡
§
¶
CCL
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be shorted at a time.
VCC = MIN, II = –12 mA –1.5 –1.5 V
VCC = MIN, VIL = 0.8 V, IOH = –0.4 mA 2.4 3.4 2.4 3.4 V
VCC = MIN, VIH = 2 V, IOL = 16 mA 0.2 0.4 0.2 0.4 V
VCC = MAX, VI = 5.5 V 1 1 mA
VCC = MAX, VI = 2.4 V 40 40 µA
VCC = MAX, VI = 0.4 V –1.6 –1.6 mA
VCC = MAX –20 –55 –18 –55 mA
VCC = MAX, VI = 0 V 6 12 6 12 mA
VCC = MAX, VI = 4.5 V 18 33 18 33 mA
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
SN5404
SN7404
MIN TYP MAX
12 22
8 15
UNIT
PARAMETER
t
PLH
t
PHL
FROM
TO
TEST CONDITIONS
=
,
= 15
p
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN5404, SN54LS04, SN54S04,
SN54LS04
SN74LS04
UNIT
PARAMETER
TEST CONDITIONS
†
UNIT
V
V
MIN
V
2 V
V
(INPUT)
(OUTPUT)
A
Y
R
L
C
L
F
ns
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
recommended operating conditions
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
Not more than one output should be shorted at a time and the duration of the short-circuit should not exceed one second.
Supply voltage 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –0.4 –0.4 mA
Low-level output current 4 8 mA
Operating free-air temperature –55 125 0 70 °C
SN54LS04 SN74LS04
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
OL
I
I
I
IH
I
IL
I
OS
I
CCH
I
CCL
§
VCC = MIN, II = –18 mA –1.5 –1.5 V
VCC = MIN, VIL = MAX, IOH = –0.4 mA 2.5 3.4 2.7 3.4 V
,
=
CC
VCC = MAX, VI = 7 V 0.1 0.1 mA
VCC = MAX, VI = 2.7 V 20 20 µA
VCC = MAX, VI = 0.4 V –0.4 –0.4 mA
VCC = MAX –20 –100 –20 –100 mA
VCC = MAX, VI = 0 V 1.2 2.4 1.2 2.4 mA
VCC = MAX, VI = 4.5 V 3.6 6.6 3.6 6.6 mA
=
IH
IOL = 4 mA 0.25 0.4 0.4
IOL = 8 mA 0.25 0.5
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2)
PARAMETER
t
PLH
t
PHL
FROM
TO
TEST CONDITIONS
= 2 kΩ,
= 15
SN54LS04
SN74LS04
MIN TYP MAX
p
9 15
10 15
UNIT
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54S04
SN74S04
UNIT
PARAMETER
TEST CONDITIONS
†
UNIT
(INPUT)
(OUTPUT)
A
Y
R
L
280 Ω
C
L
F
ns
A
Y
R
L
280 Ω
C
L
F
ns
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
recommended operating conditions
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
Not more than one output should be shorted at a time and the duration of the short-circuit should not exceed one second.
Supply voltage 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –1 –1 mA
Low-level output current 20 20 mA
Operating free-air temperature –55 125 0 70 °C
SN54S04 SN74S04
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CCH
I
CCL
§
VCC = MIN, II = –18 mA –1.2 –1.2 V
VCC = MIN, VIL = 0.8 V, IOH = –1 mA 2.5 3.4 2.7 3.4 V
VCC = MIN, VIH = 2 V, IOL = 20 mA 0.5 0.5 V
VCC = MAX, VI = 5.5 V 1 1 mA
VCC = MAX, VI = 2.7 V 50 50 µA
VCC = MAX, VI = 0.5 V –2 –2 mA
VCC = MAX –40 –100 –40 –100 mA
VCC = MAX, VI = 0 V 15 24 15 24 mA
VCC = MAX, VI = 4.5 V 30 54 30 54 mA
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
PARAMETER
t
PLH
t
PHL
t
PLH
t
PHL
FROM
TO
TEST CONDITIONS
=
=
,
,
= 15
= 50
SN54S04
SN74S04
MIN TYP MAX
p
p
3 4.5
3 5
4.5
5
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
PARAMETER MEASUREMENT INFORMATION
SERIES 54/74 AND 54S/74S DEVICES
From Output
Under Test
(see Note A)
Test
Point
C
L
V
CC
R
L
(see Note B)
From Output
Under Test
(see Note A)
V
CC
V
CC
R
L
Test
Point
C
L
From Output
Under Test
(see Note A)
Test
R
Point
C
L
L
S1
(see Note B)
1 kΩ
S2
FOR 2-STATE TOTEM-POLE OUTPUTS
High-Level
Low-Level
In-Phase
(see Note D)
Out-of-Phase
(see Note D)
NOTES: A. CL includes probe and jig capacitance.
LOAD CIRCUIT
Pulse
Pulse
Input
t
PLH
Output
t
PHL
Output
PROPAGATION DELAY TIMES
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω; tr and tf ≤ 7 ns for Series
54/74 devices and tr and tf ≤ 2.5 ns for Series 54S/74S devices.
F. The outputs are measured one at a time with one input transition per measurement.
1.5 V 1.5 V
t
w
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
VOLTAGE WAVEFORMS
, t
PLH
PHL
t
PHL
t
PLH
, t
FOR OPEN-COLLECTOR OUTPUTS
PHZ
LOAD CIRCUIT
3 V
0 V
V
OH
V
OL
V
OH
V
OL
, and t
PLZ
Timing
Input
Data
Input
Output
Control
(low-level
enabling)
t
PZL
Waveform 1
(see Notes C
and D)
t
PZH
Waveform 2
(see Notes C
and D)
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
; S1 is open and S2 is closed for t
FOR 3-STATE OUTPUTS
1.5 V
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V 1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
; S1 is closed and S2 is open for t
PZH
LOAD CIRCUIT
3 V
0 V
t
h
3 V
0 V
t
PLZ
V
t
PHZ
V
3 V
0 V
≈1.5 V
VOL + 0.5 V
OL
OH
VOH – 0.5 V
≈1.5 V
PZL
.
Figure 1. Load Circuits and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
(see Note A)
Test
Point
C
L
SDLS029B – DECEMBER 1983 – REVISED FEBRUARY 2002
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
V
CC
V
CC
R
L
R
(see Note B)
From Output
Under Test
(see Note A)
C
L
L
Test
Point
SN5404, SN54LS04, SN54S04,
SN7404, SN74LS04, SN74S04
HEX INVERTERS
V
CC
From Output
Under Test
(see Note A)
Test
R
Point
C
L
L
S1
(see Note B)
5 kΩ
S2
FOR 2-STATE TOTEM-POLE OUTPUTS
High-Level
Low-Level
In-Phase
(see Note D)
Out-of-Phase
(see Note D)
NOTES: A. CL includes probe and jig capacitance.
LOAD CIRCUIT
Pulse
Pulse
Input
t
PLH
Output
t
PHL
Output
PROPAGATION DELAY TIMES
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns.
G. The outputs are measured one at a time with one input transition per measurement.
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
VOLTAGE WAVEFORMS
, t
PLH
PHL
t
PHL
t
PLH
, t
FOR OPEN-COLLECTOR OUTPUTS
PHZ
LOAD CIRCUIT
3 V
0 V
V
OH
V
OL
V
OH
V
OL
, and t
PLZ
Timing
Input
Data
Input
Output
Control
(low-level
enabling)
t
PZL
Waveform 1
(see Notes C
and D)
t
PZH
Waveform 2
(see Notes C
and D)
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
; S1 is open and S2 is closed for t
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V
t
su
1.3 V 1.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.3 V 1.3 V
1.3 V
1.3 V
VOLTAGE WAVEFORMS
; S1 is closed and S2 is open for t
PZH
3 V
0 V
t
h
3 V
0 V
3 V
0 V
t
PLZ
≈1.5 V
VOL + 0.5 V
V
OL
t
PHZ
V
OH
VOH – 0.5 V
≈1.5 V
.
PZL
Figure 2. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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accordance with TI’s standard warranty . Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
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Copyright 2002, Texas Instruments Incorporated
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