Texas Instruments SLVU013 User Manual
User’s Guide
June 1999 Mixed-Signal Linear Products
SLVU013
IMPORTANT NOTICE
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright 1999, Texas Instruments Incorporated
About This Manual
This user’s guide describes techniques for designing synchronous buck
converters using TI’s SL VP11 1 1–114 evaluation modules (EVM) and TPS56xx
ripple regulator controllers.
How to Use This Manual
Information About Cautions and Warnings
Preface
Read This First
This document contains the following chapters:
Chapter 1 Introduction
Chapter 2 Design Procedure
Chapter 3 Test Results
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you
.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.
Read This First
iii
Trademarks
Related Documentation From Texas Instruments
Synchronous Buck Converter Design Using TPS56xx Controllers in
SLVP10x EVMs User’s Guide
TPS56xx data sheet (literature number SLVS177A)
(literature number SLVU007).
Designer’s Notebook
The TPS56xx Family of Power Supply Controllers
(literature number SLVT140A)
Designing Fast Response Synchronous Buck Regulators Using the
TPS5210 (literaure number SLVA044).
FCC Warning
This equipment is intended for use in a laboratory test environment only . It generates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.
iv
Running Title—Attribute Reference
Contents
1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Synchronous Buck Regulator Operation 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Hysteretic Control Operation 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Design Strategy 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Design Specification Summary 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Schematic 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Bill of Materials 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 Board Layout 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Design Procedure 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 TPS56xx Functions 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 V
2.1.2 Inhibit 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Slowstart Design 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 Hysteresis Setting 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.5 Noise Suppression 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.6 Overcurrent Protection 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.7 Overvoltage Protection 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.8 Power Good 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.9 Bias 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.10 Gate Drivers 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 External Component Selection 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 Duty Cycle Estimate 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 Input Capacitance 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3 Output Filter Design 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4 Switching Frequency Analysis 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5 Power MOSFET Selection 2-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Lockout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
3 Test Results 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Test Summary 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Static Line and Load Regulation 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Output Voltage Ripple 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Efficiency and Power Losses 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4 Output Start-Up and Overshoot 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.5 Frequency Variation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.6 Load Current Transient Response 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.7 Features 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.8 Conclusion 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Test Setup 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Test Results 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter Title—Attribute Reference
v
Running Title—Attribute Reference
Figures
1–1 Simplified Synchronous Buck Converter Schematic 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 Simplified Hysteretic Controlled Output Voltage Waveform 1-3. . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 SLVP111–114 EVM Converter Schematic Diagram 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–4 Top Assembly 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–5 Bottom Assembly (Top View) 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–6 Top Layer 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–7 Bottom Layer (Top VIew) 1-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 TPS56xx Functional Block Diagram 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Block Diagram Showing Noise Suppression Circuits 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 V
2–4 Gate Driver Block Diagram 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5 I–V Characteristic Curve for Low-Side Gate Drivers 2-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–6 Output Ripple Voltage Detail 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Test Setup 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 SLVP111 Measured Load Regulation 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 SLVP111Measured Efficiency 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 SLVP111Measured Power Dissipation 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 SLVP111Measured Switching Frequency 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–6 SLVP111 Measured Switching Waveforms 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–7 SLVP111Measured Start-Up (INHIBIT) Waveforms 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–8 SLVP111 Measured Start-Up (V
3–9 SLVP111Measured Start-Up (V
3–10 SLVP111 Measured Load Transient Waveforms 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–11 SLVP112 Measured Load Regulation 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–12 SLVP112 Measured Efficiency 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–13 SLVP112 Measured Power Dissipation 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–14 SLVP112 Measured Switching Frequency 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–15 SLVP112 Measured Switching W aveforms 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–16 SLVP112 Measured Start-Up (INHIBIT) W aveforms 3-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–17 SLVP112 Measured Start-Up (V
3–18 SLVP112 Measured Start-Up (VIN) Waveforms 3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–19 SLVP112 Measured Load T ransient Waveforms 3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–20 SLVP113 Measured Load Regulation 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–21 SLVP113 Measured Efficiency 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–22 SLVP113 Measured Power Dissipation 3-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–23 SLVP113 Measured Switching Frequency 3-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–24 SLVP113 Measured Switching W aveforms 3-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–25 SLVP113 Measured Start-Up (INHIBIT) W aveforms 3-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–26 SLVP113 Measured Start-Up (V
Sensing Circuit 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DS
) Waveforms 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
) Waveforms 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IN
) Waveforms 3-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
) Waveforms 3-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
vi
Running Title—Attribute Reference
3–27 SLVP113 Measured Start-Up (VIN) Waveforms 3-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–28 SLVP113 Measured Load T ransient Waveforms 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–29 SLVP114 Measured Load Regulation 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–30 SLVP114 Measured Efficiency 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–31 SLVP114 Measured Power Dissipation 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–32 SLVP114 Measured Switching Frequency 3-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–33 SLVP114 Measured Switching W aveforms 3-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–34 SLVP114 Measured Start-Up (INHIBIT) W aveforms 3-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–35 SLVP114 Measured Start-Up (V
3–36 SLVP114 Measured Start-Up (V
3–37 SLVP114 Measured Load T ransient Waveforms 3-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
) Waveforms 3-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
) Waveforms 3-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IN
T ables
1–1 Summary of EVM Converter Modules 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 EVM Converter Operating Specifications 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 SLVP111–114 EVMs Bill of Materials 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
vii
viii
Chapter 1
Introduction
The SLVP111/112/113/114 evaluation modules (EVMs) have been designed
and tested using the TPS56xx hysteretic controllers. These boards are
synchronous dc-dc buck converters with fixed output voltages of 3.3 V , 2.5 V,
1.8 V and 1.5 V respectively. They use only surface mount components and
are design examples of how to use TI’s TPS56xx controllers in high density,
low loss applications with tight static and dynamic output voltage
requirements. Detailed test results taken from the EVMs are presented.
Design simplicity , low component count, and lower cost make buck converters
popular solutions where low input voltages are available for the converter and
where isolation is not a requirement.
This user’s guide describes techniques for designing synchronous buck
converters using TI’s SLVP111–114 EVMs and TPS56xx ripple regulator
controllers. Synchronous buck converters provide an elegant power supply
solution for rapidly transitioning DSP loads (such as the Texas Instruments
TMS320C62x/67x family), fast memory, and similar processors. An order of
magnitude improvement in dynamic response of this converter over standard
control methods reduces hold-up capacitance needs near the transitioning
loads, thus saving cost and board space.
Topic Page
1.1 Synchronous Buck Regulator Operation 1–2. . . . . . . . . . . . . . . . . . . . . . . .
1.2 Hysteretic Control Operation 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Design Strategy 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Design Specification Summary 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Schematic 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Bill of Materials 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 Board Layout 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction
1-1
Synchronous Buck Regulator Operation
1.1 Synchronous Buck Regulator Operation
The synchronous buck converter is a variation of the traditional buck
converter. The main switching device is usually a power MOSFET and is
driven in the same manner as in a traditional buck converter. The freewheeling
rectifier, usually a Schottky device, is replaced by a power MOSFET and is
driven in a complementary or synchronous fashion relative to the main
switching device; when one MOSFET is on, the other is off. The freewheeling
MOSFET is selected so that its ON voltage drop is less than the forward drop
of the original freewheeling rectifier, thus increasing conversion efficiency. A
very important design issue when using a synchronous buck converter is
preventing cross-conduction of the two power MOSFET s, i.e., preventing both
MOSFETs from being on simultaneously. A small amount of deadtime is
necessary.
Figure 1 shows a simplified schematic of a synchronous buck converter. The
TPS56xx senses the output voltage and then drives Q1 and Q2 depending on
the sensed voltage. The TPS56xx senses the voltage at the junction of Q1, Q2,
and L1 and uses it to actively prevent simultaneous conduction of Q1 and Q2.
Figure 1–1.Simplified Synchronous Buck Converter Schematic
V
I
TPS56xx
Q1
Q2
+
L1
V
O
+
C
1-2
1.2 Hysteretic Control Operation
Hysteretic control, also called bang-bang control or ripple regulator control,
maintains the output voltage within the hysteresis band centered about the
internal reference voltage. Figure 1–2 shows a simplified example of a
hysteretic controlled output voltage using the TPS5625 with a reference
voltage of 2.500 V and a hysteresis band of 50 mV. If the output voltage is at
or below the level of the reference minus one-half of the hysteresis band
(V
= 2.475 V), the TPS5625 turns off the low-side MOSFET (Q2 in Figure
Lo
1–1) and turns on the high-side MOSFET (Q1 in Figure 1–1) of the
synchronous buck converter power stage. This is the power stage on-state,
and it causes the output voltage to increase. When the output voltage reaches
or exceeds the reference plus one-half of the hysteresis band (V
the TPS5625 turns off the high-side MOSFET and turns on the low-side
MOSFET. This is the power stage off-state, and it causes the output voltage
to decrease. This hysteretic method of control keeps the output voltage within
the hysteresis band around the reference voltage. If output-load current steps
or input-voltage transients force the output voltage out of the hysteresis band,
the TPS5625 sets the power-stage MOSFET s in the continuous on or off state
as required to return the output voltage to the hysteresis band. Thus, the
output voltage is corrected as quickly as the output filter allows. There are no
error amplifier sensing and adjusting delays, as is the case with either voltageor current-mode controllers. Other advantages of hysteretic control include no
loop compensation design and no input filter interaction problems.
Hysteretic Control Operation
= 2.525 V),
Hi
Figure 1–2.Simplified Hysteretic Controlled Output Voltage Waveform
Output
Voltage
2.525 V
2.500 V
2.475 V
On Time Off Time
T
s
V
Hi
V
Lo
Time
Hysteresis
Introduction
1-3
Design Strategy
1.3 Design Strategy
The SLVP111–114 evaluation modules (EVMs) are optimized for 5-V main
input voltage and 6-A output current. The EVMs need an additional low current
12-V (30 mA max) input voltage for the controller. TI’s application report,
Providing a DSP Power Solution from 5 V or 3.3 V Only Systems
number SPRA525 describes how one can implement a simple boost circuit for
5-V only input voltage applications. These EVMs are pin to pin compatible with
SLVP104/105/106/115 evaluation boards with 8 A output current, which
combine surface mount and through hole components. This surface mount
version has the same length, 2″, and width, 0.75″, but the height is significantly
lower, 0.375″ versus 0.6″ for through hole version.
The TI SLVP111–114 evaluation modules (EVM) provide synchronous buck
converter circuits for evaluating the capabilities of the TPS56xx family of ripple
regulator controllers. The EVM converters can provide proven, demonstrated
reference designs to aid in the rapid development of application-specific
synchronous buck converters. Output capacities of the EVM converters are
optimized for the Siliconix Si4410 power MOSFET device.
The 6-ampere output current level is a reasonable selection criteria for
powering circuit cards with multiple DSPs, and for providing the regulated
voltage to other hardware on the circuit card. Component size can be reduced
for designs requiring lower power levels.
, TI literature
The TPS56xx controllers each provide one of four popular output voltage
levels. The last two digits of the part number correlate to the set-point voltage
level: TPS5633 is the 3.3-V controller, TPS5625 is the 2.5-V controller,
TPS5618 is the 1.8-V controller, and TPS5615 is the 1.5-V controller. Many
digital devices, memories, and DSP I/O circuits use the 3.3-V level. The core
of the TMS320C6201 requires 2.5-V . All of the other DSPs in the TMS320C62x
and the TMS320C67x family need 1.8 V. The GTL bus, as well as various
processors and future DSPs, may require the 1.5-V controller. An external
resistor divider can be used to fine tune the output voltages of these controllers
for other applications including output voltages up to approximately
V
– 0.5 V.
IN
Table 1–1 summarizes the four EVM converter modules.
Table 1–1.Summary of EVM Converter Modules
EVM Part Number EVM Board
TPS5633EVM–111 SLVP111 TPS5633 3.3 V 6 A
TPS5625EVM–112 SLVP112 TPS5625 2.5 V 6 A
TPS5618EVM–113 SLVP113 TPS5618 1.8 V 6 A
TPS5615EVM–114 SLVP114 TPS5615 1.5 V 6 A
Number
Controller Output
Voltage
Max. Output
Current
†
†
†
†
1-4
†
Output current is limited by the temperature rise of the power MOSFETs chosen. Higher or
lower current designs are possible
.
1.4 Design Specification Summary
g
y
k
O erating frequency
()
S
)
This section summarizes the design requirements of the EVM converters.
Although every attempt was made to accurately describe the performance of
the EVM converters and the TPS56xx controllers, in case of conflicts, the
TPS56xx data sheet takes precedence over this document.
The TPS56xx family of controllers provides the necessary regulation
functions. In addition to a reference voltage accuracy of ±1% over the full
operating temperature range, the controller has remote sense inputs to
provide a precisely regulated output voltage. The controller also provides
undervoltage lock-out, overload protection, overvoltage protection, and
overtemperature protection. The controller has a logic level INHIBIT input to
control the converter turn-on and turn-off and a power good output to indicate
output voltage status. Undervoltage lock-out prevents operation of the power
supply when the 12 Vdc input voltage is not sufficient for proper operation.
Overload protection protects the power supply from accidental overloads or
short circuits. Overvoltage protection prevents damage to the load in the event
of an internal power supply failure or presence of high voltages on the output
from an external condition. Both overvoltage and overcurrent cause a latched
shutdown. Both power MOSFETs are driven to an OFF state. Recovery from
shutdown requires removal of the 12 V control input supply for reset. T able 1–2
lists the operating specifications of the EVM converters.
Design Specification Summary
Table 1–2.EVM Converter Operating Specifications
Specification Min Typ Max Units
Power input voltage range 4.5 6 V
Control input voltage range 10.8 13.2 V
Static voltage tolerance
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
Line regulation
Load regulation
Transient response
Output current range
Current limit
Operatin
SLVP111 (3.3 V) 135 kHz
SLVP112 (2.5 V) 225 kHz
SLVP113 (1.8 V)
LVP114 (1.8 V
‡
§
#
frequenc
†
3.27
2.47
1.78
1.48
¶
#
3.30
2.50
1.80
1.50
± 0.05% ± 0.1%
± 0.2% ± 0.4%
± 100
50
06A
295
360 kHz
3.33
2.53
1.82
1.52
10 A
V
V
V
mV pk
µsec
kHz
Introduction
1-5
Design Specification Summary
Table 1–2.EVM Converter Operating Specifications (Continued)
Specification Min Typ Max Units
Output ripple
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
||
66
50
36
30
mV p–p
mV p–p
mV p–p
mV p–p
Efficiency, 6 A load
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
90%
86.4%
83.2%
79.8%
Efficiency, 4 A load
SLVP111 (3.3 V)
SLVP112 (2.5 V)
SLVP113 (1.8 V)
SLVP114 (1.5 V)
†
Vi = 5 V, Io = 6 A
‡
Io = 6 A, Vi = 5 V ±10%
§
Vi = 5 V
¶
Vi = 5 V, Io stepped repetitively from 0 A to 6.5 A
#
Output current rating is limited by thermal considerations. Load currents above this rating may
cause damage to the power supply.
||
Unless otherwise specified, all test conditions are TA = 25_C, Vi = 5 V, Io = 6 A, Vo = nominal.
k
Vi = 5 V, Io = 6 A, Vo = nominal
91.6%
88.6%
85.1%
81.9%
1-6
1.5 Schematic
Figure 1–3 shows the EVM converter schematic diagram. The schematic
diagrams for the other EVM converters are identical except for the controller
IC used.
Figure 1–3.SLVP111–114 EVM Converter Schematic Diagram
Schematic
O
V
J1–18
J1–17
J1–16
J1–15
SLVP111 = 3.3 V
SLVP112 = 2.5 V
SLVP113 = 1.8 V
SLVP114 = 1.5 V
L2
1.5 µ H
6.3 V
6.3 V
150 µ F
+
C2
L1
2.2 µ H
+C1
6.3 V
150 µ F
150 µ F
+
+
C3
C4
Q1
Si4410
R3
R15
1 M
C7
C5 0.1µF
R2
10 kΩ
R1
1 kΩ
10 V
33 µ F
1µF
0.1 µ F
C6
2.2 µ F
C9
10 Ω
C8
VCC
BOOT
16
HUGHDR
17
BOOTLO
18
HISENSE
19
LOSENSE
20
IOUTLO
21
INHIBIT
22
NC
23
NC
24
NC
25
NC
26
NC
27
PWRGD
28
J1–4
R6
4.7 Ω
10 µ F
C14
+
C13
150 µ F
+
C12
150 µ F
+
C11
150 µ F
+
C10
150 µ F
2.7 Ω
R5
R4
1µF
DRV
14 15
LOWDR
13
DRVGND
12
LOHIB
11
LODRV
10
BIAS
9
SLOWST
8
ANAGND
7
VSENSE
6
VREFB
5
VHYST
4
OCP
3
AGND2
2
IOUT
1
TPS5633 (See Note)
U1
SENSEHVSENSEL/VANAGND
J1–2
4 V
C15
0.01 µ F
Q2
10 Ω
C16
Si4410
1µF
PWR
GND
J1–11
J1–14
J1–13
J1–12
R12
4.7 Ω
C18
0.1 µ F
R8
100 Ω 1%
C22
1µF
C21
0.1 µ F
1%
R11
20 kΩ
C20
1000 pF
R10
C17
R7
1 kΩ
R10
1%
100 Ω
0.1 µ F
R9
1%
20 kΩ
C19
0.01 µ F
TPS5633 = 3.3 V (SLVP111)
TPS5625 = 2.5 V (SLVP112)
TPS5618 = 1.8 V (SLVP113)
R13
11 kΩ
750 Ω
TPS5618 = 1.5 V (SLVP114)
NOTE: Last two digits of U1 indicates output voltage option
J1–5
V
J1–6
I
J1–9
J1–10
RETURN
J1–7
12 V
J1–8
J1–3
PG
RETURN
J1–1
INHIBIT
Introduction
1-7
Bill of Materials
1.6 Bill of Materials
Table 1–3 lists materials required for the SLVP111–114 EVMs.
Table 1–3.SLVP111–114 EVMs Bill of Materials
Ref Des Part Number Description MFG
C1 10TPA33M Capacitor, POSCAP, 33 µF, 10 V, 20% Sanyo
C2 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C3 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C4 6TPB150M Capacitor, POSCAP, 150 µF, 6.3 V, 20% Sanyo
C5 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C6 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C7 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
C8 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16V, +80%–20% muRata
C9 GRM42–6Y5V225Z016A Capacitor, Ceramic, 2.2 µF, 16V, Y5V muRata
C10 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C11 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C12 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C13 4TPC150M Capacitor, POSCAP, 150 µF, 4 V, 20% Sanyo
C14 GRM235Y5V106Z016A Capacitor, Ceramic, 10 µF, 16 V, Y5V muRata
C15 GRM42-6Y5V103Z025A Capacitor, Ceramic, 0.01 µF, 25 V, +80%–20%, Y5V muRata
C16 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
C17 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C18 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C19 GRM39X7R103K025A Capacitor, Ceramic, 0.01 µF, 25 V, 10%, X7R muRata
C20 GRM39X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R muRata
C21 GRM39X7R104K016A Capacitor, Ceramic, 0.1 µF, 16 V, 10%, X7R muRata
C22 GRM42–6Y5V105Z016A Capacitor, Ceramic, 1.0 µF, 16 V, +80%–20% muRata
J1 S1122–18–ND Header, RA, 18-pin, 0.23 Posts x 0.20 Tails Sullins
L1 DO3316P–222HC Inductor, 2.2 µH, 7.4 A Coilcraft
L2 DO3316P–152HC Inductor, 1.5 µH, 9 A Coilcraft
Q1 Si4410DY FET , N-ch, 30-V, 10-A, 13-mΩ Siliconix
Q2 Si4410DY FET , N-ch, 30-V, 10-A, 13-mΩ Siliconix
R1 Std Resistor, Chip, 1 kΩ, 1/16W, 5%
R2 Std Resistor, Chip, 10 kΩ, 1/16W, 5%
R3 Std Resistor, Chip, 10 Ω, 1/10W, 5%
R4 Std Resistor, Chip, 10 Ω, 1/10W, 5%
R5 Std Resistor, Chip, 2.7 Ω, 1/4W, 5%
R6
Std Resistor, Chip, 4.7 Ω, 1/16W, 5%
1-8
Bill of Materials
Table 1–3.SLVP111–114 EVMs Bill of Materials (Continued)
Ref Des Part Number Description MFG
R7 Std Resistor, Chip, 1 kΩ, 1/16W, 5%
R8 Std Resistor, Chip, 100 Ω, 1/16W, 1%
R9 Std Resistor, Chip, 11 kΩ, 1/16W, 5%
R10 Std Resistor, Chip, 100 Ω, 1/16W, 1%
R1 1 Std Resistor, Chip, 20 kΩ, 1/16W, 1%
R12 Std Resistor, Chip, 4.7 Ω, 1/16W, 5%
R13 Std Resistor, Chip, 750 Ω, 1/16W, 5%
R14 Std Resistor, Chip, 20 kΩ, 1/16W, 1%
R15 Std Resistor, Chip, 1 MΩ, 1/16W, 5%
U1a TPS5633PWP IC, PWM Ripple Controller, Fixed 3.3-V (SLVP111 only) TI
U1b TPS5625PWP IC, PWM Ripple Controller, Fixed 2.5-V (SLVP112 only) TI
U1c TPS5618PWP IC, PWM Ripple Controller, Fixed 1.8-V (SLVP113 only) TI
U1d
TPS5615PWP IC, PWM Ripple Controller, Fixed 1.5-V (SLVP114 only) TI
Introduction
1-9
Board Layout
1.7 Board Layout
Figures 1–4 through 1–7 show the board layouts for the SLVP111–114
evaluation modules.
Figure 1–4.Top Assembly
Figure 1–5.Bottom Assembly (Top View)
Top Assembly
Figure 1–6.Top Layer
1-10
Bottom Assembly (Top View)
Top Layer
Figure 1–7.Bottom Layer (Top VIew)
Board Layout
Bottom Layer (Top View)
Introduction
1-1 1
1-12
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