查询REG103供应商
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REG103
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SBVS010B – JANUARY 2000 – REVISED FEBRUARY 2004
DMOS
500mA Low-Dropout Regulator
REG103
FEATURES
● NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
115mV Typ at 500mA and 3.3V Output
Output Capacitor NOT Required for Stability
● FAST TRANSIENT RESPONSE
●
VERY LOW NOISE:
33µVrms
● HIGH ACCURACY: ±2% max
● HIGH EFFICIENCY:
I
= 1mA at I
GND
Not Enabled: I
= 500mA
OUT
= 0.5µA
GND
● 2.5V, 2.7V, 3.0V, 3.3V, 5.0V, AND ADJUSTABLE
OUTPUT VERSIONS
● FOLDBACK CURRENT LIMIT
● THERMAL PROTECTION
● OUTPUT VOLTAGE ERROR INDICATOR
(1)
● SMALL SURFACE-MOUNT PACKAGES:
SOT223-5, DDPAK-5, SO-8
APPLICATIONS
● PORTABLE COMMUNICATION DEVICES
● BATTERY-POWERED EQUIPMENT
● PERSONAL DIGITAL ASSISTANTS
● MODEMS
● BAR-CODE SCANNERS
● BACKUP POWER SUPPLIES
DESCRIPTION
The REG103 is a family of low-noise, low-dropout, linear
regulators with low ground pin current. Its new DMOS
topology provides significant improvement over previous
designs, including low-dropout voltage (only 115mV typ at
full load), and better transient performance. In addition, no
output capacitor is required for stability, unlike conventional
low-dropout regulators that are difficult to compensate and
require expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 1mA (at I
and drops to 0.5µA in not enabled mode. Unlike regulators
with PNP pass devices, quiescent current remains relatively
constant over load variations and under dropout conditions.
The REG103 has very low output noise (typically 33µVrms
for V
= 3.3V with CNR = 0.01µF), making it ideal for use
OUT
in portable communications equipment. On-chip trimming
results in high output voltage accuracy. Accuracy is maintained over temperature, line, and load variations. Key
parameters are tested over the specified temperature range
(–40°C to +85°C).
The SO-8 version of the REG103 has an ERROR pin that
provides a power good flag, indicating the regulator is in
regulation. The REG103 is well protected—internal circuitry provides a current limit that protects the load from
damage. Thermal protection circuitry keeps the chip from
being damaged by excessive temperature. In addition to the
SO-8 package, the REG103 is also available in the DDPAK
and the SOT223-5.
= 500mA)
OUT
ENABLE
V
IN
+
0.1µF
NR
NR = Noise Reduction
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
REG103
(Fixed Voltage
Versions)
Gnd
(1)
ERROR
+
NOTE: (1) SO-8 Package Only. (2) Optional.
1)
ENABLE
V
OUT
(2)
C
OUT
V
IN
www.ti.com
+
0.1µF
REG103-A
Gnd
Copyright © 2000-2004, Texas Instruments Incorporated
ERROR
R
Adj
R
V
OUT
+
1
2
(2)
C
OUT
ABSOLUTE MAXIMUM RATINGS
Supply Input Voltage, VIN.......................................................–0.3V to 16V
Enable Input ............................................................................ –0.3V to V
Error Flag Output .....................................................................–0.3V to 6V
Error Flag Current ...............................................................................2mA
Output Short-Circuit Duration ......................................................Indefinite
Operating Temperature Range ....................................... –55°C to +125°C
Storage Temperature Range .......................................... –65°C to +150°C
Junction Temperature ..................................................... –55°C to +150°C
Lead Temperature
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
(soldering, 3s, SO-8, SOT, and DDPAK)
(1)
IN
............... +240°C
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY
5V Output
REG103FA-5 DDPAK-5 KTT –40°C to +85°C REG103FA-5.0 REG103FA-5KTTT Tape and Reel, 50
(1)
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
"""""REG103FA-5/500 Tape and Reel, 500
REG103UA-5 SO-8 D –40°C to +85°C REG103U50 REG103UA-5 Rails, 100
"""""REG103UA-5/2K5 Tape and Reel, 2500
REG103GA-5 SOT223-5 DCQ –40°C to +85°C R103G50 REG103GA-5 Rails, 78
"""""REG103GA-5/2K5 Tape and Reel, 2500
3.3V Output
REG103FA-3.3 DDPAK-5 KTT –40°C to +85°C REG103FA-3.3 REG103FA-3.3KTTT Tape and Reel, 50
"""""REG103FA-3.3/500 Tape and Reel, 500
REG103UA-3.3 SO-8 D –40°C to +85°C REG103UA4 REG103UA-3.3 Rails, 100
"""""REG103UA-3.3/2K5 Tape and Reel, 2500
REG103GA-3.3 SOT223-5 DCQ –40°C to +85°C R103G33 REG103GA-3.3 Rails, 78
"""""REG103GA-3.3/2K5 Tape and Reel, 2500
3.0V Output
REG103FA-3 DDPAK-5 KTT –40°C to +85°C REG103FA-3.0 REG103FA-3KTTT Tape and Reel, 50
"""""REG103FA-3/500 Tape and Reel, 500
REG103UA-3 SO-8 D –40°C to +85°C REG103U30 REG103UA-3 Rails, 100
"""""REG103UA-3/2K5 Tape and Reel, 2500
REG103GA-3 SOT223-5 DCQ –40°C to +85°C R103G30 REG103GA-3 Rails, 78
"""""REG103GA-3/2K5 Tape and Reel, 2500
2.7V Output
REG103FA-2.7 DDPAK-5 KTT –40°C to +85°C REG103FA-2.7 REG103FA-2.7KTTT Tape and Reel, 50
"""""REG103FA-2.7/500 Tape and Reel, 500
REG103UA-2.7 SO-8 D –40°C to +85°C REG103U27 REG103UA-2.7 Rails, 100
"""""REG103UA-2.7/2K5 Tape and Reel, 2500
REG103GA-2.7 SOT223-5 DCQ –40°C to +85°C R103G27 REG103GA-2.7 Rails, 78
"""""REG103GA-2.7/2K5 Tape and Reel, 2500
2.5V Output
REG103FA-2.5 DDPAK-5 KTT –40°C to +85°C REG103FA-2.5 REG103FA-2.5KTTT Tape and Reel, 50
"""""REG103FA-2.5/500 Tape and Reel, 500
REG103UA-2.5 SO-8 D –40°C to +85°C REG103U25 REG103UA-2.5 Rails, 100
"""""REG103UA-2.5/2K5 Tape and Reel, 2500
REG103GA-2.5 SOT223-5 DCQ –40°C to +85°C R103G25 REG103GA-2.5 Rails, 78
"""""REG103GA-2.5/2K5 Tape and Reel, 2500
Adjustable Output
REG103FA-A DDPAK-5 KTT –40°C to +85°C REG103FA-A REG103FA-AKTTT Tape and Reel, 50
"""""REG103FA-A/500 Tape and Reel, 500
REG103UA-A SO-8 D –40°C to +85°C REG103UA REG103UA-A Rails, 100
"""""REG103UA-A/2K5 Tape and Reel, 2500
REG103GA-A SOT223-5 DCQ –40°C to +85°C R103GA REG103GA-A Rails, 78
"""""REG103GA-A/2K5 Tape and Reel, 2500
NOTE: (1) For the most current package and ordering information, refer to our web site at www.ti.com.
2
REG103
SBVS010B
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C.
At TJ = +25°C, VIN = V
OUT
+ 1V (V
= 3.0V for REG103-A), V
OUT
ENABLE
= 2V, I
= 10mA, CNR = 0.01µF, and C
OUT
OUT
REG103GA, UA, FA
PARAMETER CONDITION MIN TYP MAX UNITS
OUTPUT VOLTAGE
Output Voltage Range V
REG103-2.5 2.5 V
OUT
REG103-2.7 2.7 V
REG103-3.0 3.0 V
REG103-3.3 3.3 V
REG103-5 5V
REG103-A V
Reference Voltage V
Adjust Pin Current I
Accuracy ±0.5 ±2%
= –40°C to +85°C ±2.8 %
T
J
vs Temperature dV
vs Line and Load
T
= –40°C to +85°CV
J
DC DROPOUT VOLTAGE
(2, 3)
For all models except 5V I
For 5V model I
For all models except 5V I
T
= –40°C to +85°C
J
For 5V models I
T
= –40°C to +85°C
J
REF
ADJ
/dT TJ = –40°C to +85°C70ppm/°C
OUT
V
DROP
I
= 10mA to 500mA, VIN = (V
OUT
= (V
IN
OUT
I
OUT
OUT
= 500mA 160 250 mV
OUT
OUT
OUT
+ 0.7V) to 15V
OUT
+ 0.9V) to 15V ±3.5 %
= 10mA 3 25 mV
= 500mA 115 200 mV
= 500mA 230 mV
= 500mA 280 mV
REF
VOLTAGE NOISE
f = 10Hz to 100kHz V
Without CNR (all models) CNR = 0, C
(all fixed voltage models) CNR = 0.01µF, C
With C
NR
OUTPUT CURRENT
Current Limit
T
(4)
= –40°C to +85°C 500 1000 mA
J
n
I
CL
= 0 30µVrms/V • V
OUT
= 10µF10µVrms/V • V
OUT
550 700 950 mA
RIPPLE REJECTION
f = 120Hz 65 dB
ENABLE CONTROL
V
HIGH (output enabled) V
ENABLE
LOW (output disabled) –0.2 0.5 V
V
ENABLE
HIGH (output enabled) I
I
ENABLE
I
LOW (output disabled) V
ENABLE
Output Disable Time 50 µs
ENABLE
ENABLE
V
= 2V to VIN, VIN = 2.1V to 6.5
ENABLE
= 0V to 0.5V 2 100 nA
ENABLE
(5)
2V
Output Enable Soft Start Time 1.5 ms
ERROR FLAG
Current,
Voltage,
(6)
Logic HIGH (open drain)—Normal Operation
Logic LOW—On Error
VIN = V
= V
ERROR
Sinking 500µA 0.2 0.4 V
+ 1V 0.1 10 µA
OUT
THERMAL SHUTDOWN
Junction Temperature
Shutdown 150 °C
Reset from Shutdown 130 °C
GROUND PIN CURRENT
I
Ground Pin Current I
GND
ENABLE Pin LOW V
INPUT VOLTAGE V
Operating Input Voltage Range
(7)
IN
Specified Input Voltage Range V
T
= –40°C to +85°CV
J
= 10mA 0.5 0.7 mA
OUT
I
= 500mA 1 1.3 mA
OUT
≤ 0.5V 0.5 µA
ENABLE
2.1 15 V
> 2.7V V
IN
> 2.9V V
IN
+ 0.7 15 V
OUT
+ 0.9 15 V
OUT
TEMPERATURE RANGE
Specified Range T
Operating Range –55 +125 °C
J
–40 +85 °C
Storage Range –65 +150 °C
Thermal Resistance
DDPAK-5 Surface-Mount
SO-8 Surface-Mount
SOT223-5 Surface-Mount
θ
JC
θ
JA
θ
JC
Junction-to-Case 4 °C/W
Junction-to-Ambient 150 °C/W
Junction-to-Case 15 °C/W
NOTES: (1) The REG103 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at V
(3) Not applicable for V
(4) For V
REG103 no longer regulates when V
> 6.5V, see typical characteristic “V
IN
less than 1Ω at T
less than 2.7V. (4) Current limit is the output current that produces a 10% change in output voltage from VIN = V
OUT
< V
IN
= +25°C. See typical characteristic.
J
OUT
ENABLE
+ V
vs I
DROP (MAX)
.” (6) Logic low indicates out-of-regulation condition by approximately 10%, or thermal shutdown. (7) The
ENABLE
. In drop-out or when the input voltage is between 2.7V and 2.1V, the impedance from VIN to V
(1)
= 0.1µF
, unless otherwise noted.
5.5 V
1.295 V
0.2 1 µA
±0.5 ±2.5 %
OUT
OUT
IN
1 100 nA
= V
+ 1V at fixed load.
IN
OUT
+ 1V and I
OUT
µVrms
µVrms
OUT
is typically
OUT
V
= 10mA.
REG103
SBVS010B
3
PIN CONFIGURATIONS
Top View
DDPAK-5
1234
V
GND
O
(1)
NR/Adjust
5
V
IN
ENABLE
Tab is GND
V
V
NR/Adjust
GND
OUT
OUT
SO-8
1
2
(1)
3
4
8
7
6
5
V
IN
V
IN
ERROR
ENABLE
SOT223-5
Tab is GND
12345
ENABLE
GNDV
IN
V
OUT
NR/Adjust
(1)
(F Package)
(U Package)
NOTE: (1) For REG103A-A: voltage setting resistor pin.
All other models: noise reduction capacitor pin.
(G Package)
4
REG103
SBVS010B
TYPICAL CHARACTERISTICS
1000 200 300 400 500
180
160
140
120
100
80
60
40
20
0
DC Dropout Voltage (mV)
Output Current (mA)
DC DROPOUT VOLTAGE vs OUTPUT CURRENT
= –55°C
= +25°C
= +125°C
–75 –25–50 250 50 75 100 125
0.1
0.5
0
–0.5
–1
–1.5
Output Voltage Change (%)
Temperature (°C)
OUTPUT VOLTAGE vs TEMPERATURE
(Output Voltage % Change Referred to
I
OUT
= 10mA at +25°C)
= 10mA
= 100mA
= 500mA
For all models, at TJ = +25°C and V
= 2V, unless otherwise noted.
ENABLE
OUTPUT VOLTAGE CHANGE vs I
(V
= V
IN
OUT
Refered to I
0.5
0
–0.5
–1.0
Output Voltage Change (%)
–1.5
= –55°C
= +25°C
= +125°C
1000 200 300 400 500
OUTPUT VOLTAGE CHANGE vs V
(Output Voltage % Change Refered
to V
0.5
0
+ 1V, Output Voltage % Change
= 10mA at +25°C)
OUT
I
(mA)
OUT
= V
+ 1V at I
IN
OUT
OUT
= 10mA)
OUT
IN
–0.5
–1.0
Output Voltage Change (%)
–1.5
0246 108
Input Voltage Above V
DC DROPOUT VOLTAGE vs TEMPERATURE
160
120
80
40
DC Dropout Voltage (mV)
0
–75 –25–50 250 50 75 100 125
Temperature (°C)
REG103
SBVS010B
OUT
= 10mA
= 100mA
= 500mA
= 10mA
= 100mA
= 500mA
LINE REGULATION vs TEMPERATURE
(V
= V
+ 1V to VIN = 15V )
IN
0.5
OUT
0.4
0.3
0.2
0.1
Output Voltage Change (%)
0
–75 –25–50 250 50 75 100 125
Temperature (°C)
= 10mA
= 100mA
5
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and V
= 2V, unless otherwise noted.
ENABLE
500mA
10mA
LOAD TRANSIENT RESPONSE
REG103-3.3
V
= 4.3V
IN
200mV/div200mV/div
LOAD TRANSIENT RESPONSE
REG103-Adj.
V
= 3.3V, VIN = 4.3V, CFB = 0.01µF
OUT
200mV/div200mV/div
LINE TRANSIENT RESPONSE
REG103-3.3
C
OUT
= 0
V
OUT
C
= 0
OUT
Load = 100mA
V
OUT
50mV/div50mV/div
C
OUT
= 10µF
V
OUT
I
OUT
6V
C
= 10µF
OUT
V
OUT
V
IN
5V
10µs/div
50µs/div
LINE TRANSIENT RESPONSE
REG103-Adj.
V
= 3.3V, CFB = 0.01µF, I
C
= 0
OUT
V
OUT
OUT
= 100mA
OUT
C
= 0
OUT
V
OUT
50mV/div50mV/div
C
OUT
500mA
10mA
10µs/div
LOAD REGULATION vs TEMPERATURE
0.5
IN
OUT
+ 1V and 10mA < I
< 500mA)
OUT
(V
= V
0.4
0.3
0.2
0.1
Output Voltage Change (%)
0
–75 –25–50 250 50 10075 125
Temperature (°C)
= 10µF
V
I
OUT
OUT
C
OUT
6V
5V
50µs/div
OUTPUT NOISE DENSITY
10
1
0.1
Noise Density (µV/√Hz)
CNR = 0
C
= 0
OUT
C
= 0.01µF
NR
C
= 10µF
OUT
0.01
10 100 1000 10000 100,000
Frequency (Hz)
= 10µF
V
OUT
V
IN
6
REG103
SBVS010B
TYPICAL CHARACTERISTICS (Cont.)
–75 –50 –25 0 25 50 75 100 125
3
2.5
2
1.5
1
0.5
0
I
GND
(µA)
Temperature (°C)
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
V
ENABLE
= 0V
10 100 1000 10000 100000
70
60
50
40
30
20
Ripple Rejection (dB)
Frequency (Hz)
RIPPLE REJECTION vs FREQUENCY
C
OUT
= 10µF
C
OUT
= 0
For all models, at TJ = +25°C and V
= 2V, unless otherwise noted.
ENABLE
1.2
GROUND PIN CURRENT vs TEMPERATURE
1.1
1
0.9
(mA)
0.8
GND
I
0.7
0.6
0.5
0.4
–75 –25–50 250 50 75 100 125
Temperature (°C)
1.2
GROUND PIN CURRENT vs I
OUT
1.1
1
0.9
(mA)
0.8
GND
I
0.7
0.6
0.5
0.4
1 10 100 1000
I
(mA)
OUT
= 10mA
= 100mA
= 500mA
vs TEMPERATURE
I
0.28
0.26
ADJUST
REG103-A
0.24
0.22
0.20
0.18
Adjust Pin Current (µA)
0.16
0.14
–20–40 0 40 80 120–60 20 60 100 140
Temperature (°C)
730
CURRENT LIMIT vs TEMPERATURE
720
710
700
690
680
670
660
Current Limit (mA)
650
640
630
–75 –50 –25 0 25 50 75 100 125
V
V
Temperature (°C)
REG103
SBVS010B
OUT
OUT
= V
= 1V
OUT-NOMINAL
• 0.90
7
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and V
= 2V, unless otherwise noted.
ENABLE
75
RIPPLE REJECTION vs I
70
V
= 3Vp-p, f = 120Hz
RIPPLE
OUT
65
60
55
50
Ripple Rejection (dB)
45
40
0 100 200 300 400 500
Load Current (mA)
OUTPUT DISABLE TIME
No Load
R
= 330
LOAD
1V/div
R
= 6.8Ω
LOAD
2V
0
10µs/div
V
OUT
V
ENABLE
SOFT START
No Load
1V/div
R
LOAD
2V
0
250µs/div
45
OUTPUT VOLTAGE DRIFT HISTOGRAM
40
35
30
25
20
15
Percent of Units (%)
10
5
0
40 45 50 55 60 65 70 75 80 85 90
V
Drift (ppm/°C)
OUT
= 6.8Ω
V
OUT
V
ENABLE
60
OUTPUT VOLTAGE ACCURACY HISTOGRAM
50
40
30
20
Percent of Units (%)
10
0
–1 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1
Error (%)
8
REG103
SBVS010B
BASIC OPERATION
The REG103 series is a family of LDO (Low Drop-Out)
linear regulators. The family includes five fixed output
versions (2.5V to 5.0V) and an adjustable output version. An
internal DMOS power device provides low dropout regulation with near constant ground pin current (largely independent of load and drop-out conditions) and very fast line and
load transient response. All versions include internal current
limit and thermal shutdown circuitry.
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the
adjustable output version (REG103A) and example resistor
values for some commonly used output voltages. Values for
other voltages can be calculated from the equation shown in
Figure 2. The SO-8 package provides two pins each for V
and V
adjacent to the device.
FIGURE 1. Fixed Voltage Nominal Circuit for REG103.
. Both sets of pins MUST be used and connected
OUT
ENABLE
V
IN
0.1µF
In Out
Gnd NR
REG103
ERROR
C
NR
0.01µF
Optional
C
OUT
V
OUT
None of the versions require an output capacitor for regulator stability. The REG103 will accept any output capacitor
type less than 1µF. For capacitance values larger than 1µF,
the effective ESR should be greater than 0.1Ω. This mini-
mum ESR value includes parasitics such as printed circuit
board traces, solder joints, and sockets. A minimum 0.1µF
low ESR capacitor connected to the input supply voltage is
recommended.
INTERNAL CURRENT LIMIT
The REG103 internal current limit has a typical value of
700mA. A fold-back feature limits the short-circuit current
to a typical short-circuit value of 40mA. This circuit will
protect the regulator from damage under all load conditions.
IN
Figure 3a.
A typical characteristic of V
versus I
OUT
is given in
OUT
Care should be taken in high current applications to avoid
ground currents flowing in the circuit board traces causing
voltage drops between points on the circuit. If voltage drops
occur on the circuit board ground that causes the load ground
voltage to be much lower than the ground voltage seen by
the ground pin on the REG103, the foldback current may
approach zero and the REG103 may not start up. In these
types of applications, a large value resistor can be placed
between VIN and V
to help “boost” up the output of the
OUT
REG103 during start-up, see Figure 3b. The value for the
“boost” resistor should be chosen so that the current through
the “boost” resistor is less than the minimum load current:
R
BOOST
> (VIN – V
OUT
)/I
. Typically, a good value for a
LOAD
“boost” resistor is 5kΩ.
ERRORENABLE
8
V
IN
0.1µF
Pin numbers for SO-8 package.
7
V
OUT
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I
(~200nA) may introduce an error.
ADJ
C
improves noise and transient response.
FB
REG103
= (1 + R1/R2) • 1.295V
65
1
2
I
3
4
Gnd
ADJ
R
Adj
R
1
2
FIGURE 2. Adjustable Voltage Circuit for REG103A.
C
FB
0.01µF
C
OUT
Optional
Load
V
OUT
EXAMPLE RESISTOR VALUES
V
(V) R1 (Ω)
OUT
1.295 Short Open
2.5 12.1k 13k
3 16.9k 13k
3.3 20k 13k
5 37.4k 13k
NOTE: (1) Resistors are standard 1% values.
(1)
1.21k 1.3k
1.69k 1.3k
2.0k 1.3k
3.74k 1.3k
R2 (Ω)
(1)
REG103
SBVS010B
9
REG103
ERROR
+5V
10kΩ
Pull-up
3 ENABLE
SO-8 Package
Only
6
Open
Drain
µP
3.5
3
100
2.5
2
1.5
Output Voltage (V)
1
0.5
0
0 100 200 300 400 500 600 700 800
Output Current (mA)
(a) Foldback Current Limit of the REG103-3.3 at 25°C.
R
BOOST
Load
V
OUT
V
IN
+
0.1µF
REG103
Gnd
+
0.1µF
(1) Optional.
(1)
(b) Foldback Current Boost Circuit.
FIGURE 3. Foldback Current Limit and Boost Circuit.
ENABLE
The ENABLE pin allows the regulator to be turned on and
off. This pin is active HIGH and compatible with standard
TTL-CMOS levels. Inputs below 0.5V (max) turn the regulator off and all circuitry is disabled. Under this condition,
ground pin current drops to approximately 0.5µA. When not
used, the ENABLE pin may be connected to VIN.
Internal to the part, the ENABLE pin is connected to an
input resistor-zener diode circuit, as shown in Figure 4,
creating a nonlinear input impedance. The ENABLE Pin
Current versus Applied Voltage relationship is shown in
Figure 5. When the ENABLE pin is connected to a voltage
greater than 10V, a series resistor may be used to limit the
current.
10
1
0.1
Enable Current (µA)
0.01
0.001
0 2 4 6 8 10 12 14 16
Enable Voltage
FIGURE 5. ENABLE Pin Current versus Applied Voltage.
ERROR FLAG
The error indication pin, only available on the SO-8 package
version, provides a fault indication out-of-regulation condition. During a fault condition, ERROR is pulled LOW by an
open drain output device. The pin voltage, in the fault state,
is typically less than 0.2V at 500µA.
A fault condition is indicated when the output voltage differs
(either above or below) from the specified value by approximately 10%. Figure 6 shows a typical fault-monitoring
application.
FIGURE 6. ERROR Pin Typical Fault-Monitoring Circuit.
ENABLE
FIGURE 4. ENABLE Pin Equivalent Input Circuit.
10
175kΩ
V
Z
= 10V
OUTPUT NOISE
A precision band-gap reference is used for the internal
reference voltage, V
, for the REG103. This reference is
REF
the dominant noise source within the REG103. It generates
approximately 45µVrms in the 10Hz to 100kHz bandwidth
at the reference output. The regulator control loop gains up
the reference noise, so that the noise voltage of the regulator
is approximately given by:
V Vrms
=µ
N
RR
+
12
R
2
Vrms
=µ •45
45
V
V
OUT
REF
REG103
SBVS010B
Since the value of V
10010 1000 10000 100000
10.0
1.0
0.1
nV/√Hz
Frequency
C
OUT
= 0, CFB = 0
C
OUT
= 0, CFB = 0.01µF
C
OUT
= 10µF, CFB = 0.01µF
is 1.295V, this relationship reduces to:
REF
Vrms
V
N OUT
µ
=
V
•35
V
Connecting a capacitor, CNR, from the Noise-Reduction
(NR) pin to ground, can reduce the output noise voltage.
Adding CNR, as shown in Figure 7, forms a low-pass filter
for the voltage reference. For C
= 10nF, the total noise in
NR
the 10Hz to 100kHz bandwidth is reduced by approximately
a factor of 3.5, as shown in Figure 8.
45
FIGURE 9. Output Noise Density on Adjustable Versions.
35
10Hz - 100kHz)
RMS
Output Noise Voltage
(µV
C
= 0
OUT
C
= 10µF
25
0.001 0.01 0.1 1
CNR (µF)
OUT
FIGURE 8. Output Noise versus Noise-Reduction Capacitor.
The REG103 adjustable version does not have the noisereduction pin available, however, the adjust pin is the summing junction of the error amplifier. A capacitor, CFB,
connected from the output to the adjust pin will reduce both
the output noise and the peak error from a load transient.
Figure 9 shows improved output noise performance for two
capacitor combinations.
NR
(fixed output
versions only)
C
NR
(optional)
V
REF
(1.295V)
The REG103 utilizes an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the
DMOS pass element above VIN. The charge-pump switching noise (nominal switching frequency = 2MHz) is not
measurable at the output of the regulator.
DROP-OUT VOLTAGE
The REG103 uses an N-channel DMOS as the “pass”
element. When the input voltage is within a few hundred
millivolts of the output voltage, the DMOS device behaves
like a resistor. Therefore, for low values of VIN to V
OUT
, the
regulator’s input-to-output resistance is the RdsON of the
DMOS pass element (typically 230mΩ). For static (DC)
loads, the REG103 will typically maintain regulation down
to VIN to V
voltage drop of 115mV at full-rated output
OUT
current. In Figure 10, the bottom line (DC dropout) shows
the minimum VIN to V
voltage drop required to prevent
OUT
drop-out under DC load conditions.
V
IN
Low Noise
Charge Pump
DMOS
Output
ENABLE
FIGURE 7. Block Diagram.
REG103
SBVS010B
ERROR
Over Current
Over Temp
Protection
REG103
V
OUT
R
1
Adj
(Adjustable
R
Versions)
2
NOTE: R1 and R2 are internal
on fixed output versions.
11
For large step changes in load current, the REG103 requires
a larger voltage drop across it to avoid degraded transient
response. The boundary of this “transient drop-out” region is
shown as the top line in Figure 10. Values of VIN to V
OUT
voltage drop above this line insure normal transient response.
250
200
150
100
REG103–3.3 at 25°C
DC
Transient
limited to 125°C, maximum. To estimate the margin of
safety in a complete design (including heat sink), increase
the ambient temperature until the thermal protection is
triggered. Use worst-case loads and signal conditions. For
good reliability, thermal protection should trigger more than
35°C above the maximum expected ambient condition of
your application. This produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The internal protection circuitry of the REG103 has been
designed to protect against overload conditions. It was not
intended to replace proper heat sinking. Continuously running the REG103 into thermal shutdown will degrade reliability.
Drop-Out Voltage (mV)
50
0
0 100 200 300 400 500
(mA)
I
OUT
FIGURE 10. Transient and DC Dropout.
In the transient dropout region between “DC” and “Transient”, transient response recovery time increases. The time
required to recover from a load transient is a function of both
the magnitude and rate of the step change in load current and
the available “headroom” VIN to V
voltage drop. Under
OUT
worst-case conditions (full-scale load change with VIN to
V
voltage drop close to DC dropout levels), the REG103
OUT
can take several hundred microseconds to re-enter the specified window of regulation.
TRANSIENT RESPONSE
The REG103 response to transient line and load conditions
improves at lower output voltages. The addition of a capacitor (nominal value 10nF) from the output pin to ground may
improve the transient response. In the adjustable version, the
addition of a capacitor, CFB (nominal value 10nF), from the
output to the adjust pin will also improve the transient
response.
THERMAL PROTECTION
Power dissipated within the REG103 will cause the junction
temperature to rise. The REG103 has thermal shutdown
circuitry that protects the regulator from damage. The thermal protection circuitry disables the output when the junction temperature reaches approximately 150°C, allowing the
device to cool. When the junction temperature cools to
approximately 130°C, the output circuitry is again enabled.
Depending on various conditions, the thermal protection
circuit may cycle on and off. This limits the dissipation of
the regulator, but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
POWER DISSIPATION
The REG103 is available in three different package configurations. The ability to remove heat from the die is different
for each package type and, therefore, presents different
considerations in the printed circuit-board layout. The PCB
area around the device that is free of other components
moves the heat from the device to the ambient air. While it
is difficult-to-impossible to quantify all of the variables in a
thermal design of this type, performance data for several
configurations are shown in Figure 11. In all cases, the PCB
copper area is bare copper, free of solder-resist mask, and
not solder plated. All examples are for 1-ounce copper.
Using heavier copper will increase the effectiveness in
moving the heat from the device. In those examples where
there is copper on both sides of the PCB, no connection has
been provided between the two sides. The addition of plated
through holes will improve the heat sink effectiveness.
6
5
4
3
2
Power Dissipation (Watts)
1
0
0 25 50 75 100 150125
Ambient Temperature (°C)
CONDITION PACKAGE PCB AREA THETA J-A
1 DDPAK 4in
2 SOT-223 4in
3 DDPAK None 65°C/W
4 SOT-223 0.5in
5 SO-8 None 150°C/W
2
Top Side Only 27°C/W
2
Top Side Only 53°C/W
2
Top Side Only 110°C/W
CONDITIONS
#1
#2
#3
#4
#5
FIGURE 11. Maximum Power Dissipation versus Ambient
Temperature for the Various Packages and
PCB Heat Sink Configurations.
12
REG103
SBVS010B
Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the
average output current times the voltage across the output
element, VIN to V
PVV I
voltage drop.
OUT
=•(– )
D IN OUT OUT AVG
()
Power dissipation can be minimized by using the lowest
possible input voltage necessary to assure the required
output voltage.
REGULATOR MOUNTING
The tab of both packages is electrically connected to ground.
For best thermal performance, the tab of the DDPAK surface-mount version should be soldered directly to a circuit-
THERMAL RESISTANCE vs PCB COPPER AREA
50
40
(°C/W)
JA
θ
30
REG103
Surface-Mount Package
1 oz. copper
board copper area. Increasing the copper area improves heat
dissipation. Figure 12 shows typical thermal resistance from
junction to ambient as a function of the copper area for the
DDPAK.
Although the tabs of the DDPAK and the SOT-223 are
electrically grounded, they are not intended to carry any
current. The copper pad that acts as a heat sink should be
isolated from the rest of the circuit to prevent current flow
through the device from the tab to the ground pin. Solder pad
footprint recommendations for the various REG103 devices
are presented in the Application Bulletin “Solder Pad Recommendations for Surface-Mount Devices” (SBFA015),
available from the Texas Instruments web site (www.ti.com).
Circuit-Board Copper Area
20
10
Thermal Resistance,
0
012345
Copper Area (Inches
2
)
FIGURE 12. Thermal Resistance versus PCB Area for the Five-Lead DDPAK.
180
160
140
(°C/W)
JA
120
θ
100
Thermal Resistance,
THERMAL RESISTANCE vs PCB COPPER AREA
REG103
Surface-Mount Package
1 oz. copper
80
60
40
20
0
012345
Copper Area (Inches
2
)
DDPAK Surface-Mount Package
REG103
Circuit-Board Copper Area
REG103
SOT-223 Surface-Mount Package
FIGURE 13. Thermal Resistance versus PCB Area for the Five-Lead SOT-223.
REG103
SBVS010B
13
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
PACKAGING INFORMATION
Orderable Device Status
REG103FA-2.5 OBSOLETE DDPAK/
REG103FA-2.5/500 NRND DDPAK/
REG103FA-2.5KTTT NRND DDPAK/
REG103FA-2.7 OBSOLETE DDPAK/
REG103FA-2.7/500 NRND DDPAK/
REG103FA-2.7KTTT NRND DDPAK/
REG103FA-3 OBSOLETE DDPAK/
REG103FA-3.3 OBSOLETE DDPAK/
REG103FA-3.3/500 NRND DDPAK/
REG103FA-3.3KTTT NRND DDPAK/
REG103FA-3/500 NRND DDPAK/
REG103FA-3KTTT NRND DDPAK/
REG103FA-5 OBSOLETE DDPAK/
REG103FA-5/500 NRND DDPAK/
REG103FA-5KTTT NRND DDPAK/
REG103FA-A OBSOLETE DDPAK/
REG103FA-A/500 NRND DDPAK/
REG103FA-AKTTT NRND DDPAK/
REG103GA-2.5 NRND SOP DCQ 6 78 None Call TI Level-3-240C-168 HR
REG103GA-2.5/2K5 NRND SOP DCQ 6 2500 None Call TI Level-3-240C-168 HR
REG103GA-2.7 NRND SOP DCQ 6 78 None Call TI Level-3-240C-168 HR
REG103GA-2.7/2K5 NRND SOP DCQ 6 2500 None Call TI Level-3-240C-168 HR
REG103GA-3 NRND SOP DCQ 6 78 None Call TI Level-3-240C-168 HR
REG103GA-3.3 NRND SOP DCQ 6 78 None Call TI Level-3-240C-168 HR
REG103GA-3.3/2K5 NRND SOP DCQ 6 2500 None Call TI Level-3-240C-168 HR
REG103GA-3/2K5 NRND SOP DCQ 6 2500 None Call TI Level-3-240C-168 HR
REG103GA-5 NRND SOP DCQ 6 78 None Call TI Level-2-240C-1 YEAR
REG103GA-5/2K5 NRND SOP DCQ 6 2500 None Call TI Level-2-240C-1 YEAR
REG103GA-A NRND SOP DCQ 6 78 None Call TI Level-3-240C-168 HR
(1)
Package
Type
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
Package
Drawing
KTT 5 None Call TI Call TI
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
KTT 5 None Call TI Call TI
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
KTT 5 None Call TI Call TI
KTT 5 None Call TI Call TI
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
KTT 5 None Call TI Call TI
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
KTT 5 None Call TI Call TI
KTT 5 500 None Call TI Level-3-220C-168 HR
KTT 5 50 None Call TI Level-3-220C-168 HR
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
22-Feb-2005
(3)
REG103GA-A/2K5 NRND SOP DCQ 6 2500 None Call TI Level-3-240C-168 HR
REG103UA-2.5 NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-2.5/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
REG103UA-2.7 NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-2.7/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
REG103UA-3 NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-3.3 NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-3.3/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
REG103UA-3/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
REG103UA-5 NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-5/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
REG103UA-A NRND SOIC D 8 100 None CU NIPDAU Level-3-220C-168 HR
REG103UA-A/2K5 NRND SOIC D 8 2500 None CU NIPDAU Level-3-220C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
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