Texas Instruments REG101UA Schematics

REG101
SBVS026D – JULY 2001 – REVISED SEPTEMBER 2005
DMOS
100mA Low-Dropout Regulator
REG101
FEATURES
NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
60mV typ at 100mA Output capacitor NOT required for stability
FAST TRANSIENT RESPONSE
VERY LOW NOISE:
23µVrms
HIGH ACCURACY: ±1.5% max
HIGH EFFICIENCY:
I
= 500µA at I
GND
Not Enabled: I
OUT
GND
= 10nA
= 100mA
2.5V, 2.8V, 2.85V, 3.0V, 3.3V, 5.0V, AND
ADJUSTABLE OUTPUT VERSIONS
OTHER OUTPUT VOLTAGES AVAILABLE
UPON REQUEST
FOLDBACK CURRENT LIMIT
THERMAL PROTECTION
SMALL SURFACE-MOUNT PACKAGES:
SOT23-5 and SO-8
APPLICATIONS
DESCRIPTION
The REG101 is a family of low-noise, low-dropout linear regulators with low ground pin current. Its new DMOS topology provides significant improvement over previous designs, including low dropout voltage (only 60mV typ at full load), and better transient performance. In addition, no output capacitor is required for stability, unlike conventional low-dropout regulators that are difficult to compensate and require expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 500µA (at I and drops to 10nA when not in enabled mode. Unlike regula­tors with PNP pass devices, quiescent current remains rela­tively constant over load variation and under dropout condi­tions.
The REG101 has very low output noise (typically 23µVrms for V
= 3.3V with CNR = 0.01µF), making it ideal for use
OUT
in portable communications equipment. Accuracy is main­tained over temperature, line, and load variations. Key parameters are tested over the specified temperature range (–40°C to +85°C).
The REG101 is well protected—internal circuitry provides a current limit that protects the load from damage. Thermal protection circuitry keeps the chip from being damaged by excessive temperature. The REG101 is available in the SOT23-5 and the SO-8 packages.
= 100mA)
OUT
PORTABLE COMMUNICATION DEVICES
BATTERY-POWERED EQUIPMENT
PERSONAL DIGITAL ASSISTANTS
MODEMS
BAR-CODE SCANNERS
BACKUP POWER SUPPLIES
Enable
V
IN
+
0.1µF
NR
NR = Noise Reduction
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
REG101
(Fixed Voltage
Versions)
Gnd
+
C
V
OUT
(1)
OUT
NOTE: (1) Optional.
www.ti.com
Enable
V
IN
+
0.1µF
REG101-A
Gnd
Copyright © 2000-2005, Texas Instruments Incorporated
R Adj R
1
2
V
OUT
+
(1)
C
OUT
ABSOLUTE MAXIMUM RATINGS
Supply Input Voltage, VIN.......................................................–0.3V to 12V
Enable Input Voltage, V
Feedback Voltage, VFB........................................................ –0.3V to 6.0V
NR Pin Voltage, V
Output Short-Circuit Duration ......................................................Indefinite
Operating Temperature Range (T Storage Temperature Range (T Lead Temperature
NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability.
....................................................... –0.3V to V
EN
.............................................................–0.3V to 6.0V
NR
) ................................ –55°C to +125°C
J
) ................................... –65°C to +150°C
(soldering, 3s, SOT23-5, and SO-8)
A
(1)
IN
..................... +240°C
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru­ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT V
REG101xx-
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) Output voltages from 2.5V to 5.1V in 50mV increments are available; minimum order quantities apply. Contact factory for details and availability.
yyyy/zzz
(1)
(2)
OUT
XX is package designator. YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable). ZZZ is package quantity.
PIN CONFIGURATIONS
Top View
V
OUT
V
OUT
NR/Adjust
GND
SO-8
(2)
1
(2)
2
(1)
3
4
(U Package)
8
7
6
5
(3)
V
IN
(3)
V
IN
NC
Enable
V
GND
Enable
IN
1
2
3
(N Package)
SOT23-5
5
4
V
OUT
NR/Adjust
(1)
NOTE: (1) For REG101A-A: voltage setting resistor pin. All other models: noise reduction capacitor pin.
(2) Both pin 1 and pin 2 must be connected. (3) Both pin 7 and pin 8 must be connected.
2
REG101
SBVS026D
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C.
At TJ = +25°C, VIN = V
OUT
+ 1V (V
= 2.5V for REG101-A), V
OUT
ENABLE
= 1.8V, I
= 2mA, CNR = 0.01µF, and C
OUT
OUT
PARAMETER CONDITION MIN TYP MAX UNITS OUTPUT VOLTAGE
Output Voltage V
OUT
REG101-2.5 2.5 V REG101-2.8 2.8 V REG101-2.85 2.85 V REG101-3.0 3.0 V REG101-3.3 3.3 V REG101-5 5V REG101-A 2.5 5.5 V
Reference Voltage V Adjust Pin Current I
REF
ADJ
Accuracy ±0.5 ±1.5 %
Over Temperature vs Temperature dV
Includes Line and Load
Over Temperature V
DC DROPOUT VOLTAGE
(2)
For all models I
Over Temperature I
VOLTAGE NOISE V
Without C With C
NR
(all fixed voltage models) CNR = 0.01µF, C
NR
/dT 50 ppm/°C
OUT
V
DROP
I
= 2mA to 100mA, VIN = (V
OUT
n
+ 0.4V) to 10V
OUT
+ 0.6V) to 10V ±2.7 %
= 2mA 4 10 mV
= 100mA 60 100 mV
= 100mA 130 mV
IN
= (V
OUT
OUT
OUT
I
OUT
f = 10Hz to 100kHz
CNR = 0, C
= 0 23µVrms/V • V
OUT
= 10µF7µVrms/V • V
OUT
OUTPUT CURRENT
Current Limit
(3)
I
CL
130 170 220 mA
Over Temperature 110 240 mA
Short-Circuit Current I
SC
RIPPLE REJECTION
f = 120Hz I
= 100mA 65 dB
OUT
ENABLE CONTROL
V
High (output enabled) V
ENABLE
V
Low (output disabled) –0.2 0.5 V
ENABLE
I
High (output enabled) I
ENABLE
I
Low (output disabled) V
ENABLE
Output Disable Time C Output Enable Time C
ENABLE
ENABLE
V
= 1.8V to VIN, VIN = 1.8V to 6.5
ENABLE
= 0V to 0.5V 2 100 nA
ENABLE
= 1.0µF, R
OUT
= 1.0µF, R
OUT
(4)
= 33 200 µs
LOAD
= 33 1.5 ms
LOAD
1.8 V
THERMAL SHUTDOWN
Junction Temperature
Shutdown 160 °C Reset from Shutdown 140 °C
GROUND PIN CURRENT
Ground Pin Current I
GND
Enable Pin Low V
INPUT VOLTAGE V Operating Input Voltage Range
(5)
IN
Specified Input Voltage Range V
Over Temperature VIN > 1.8V V
I
= 2mA 400 500 µA
OUT
I
= 100mA 500 650 µA
OUT
0.5V 0.01 0.2 µA
ENABLE
1.8 10 V
> 1.8V V
IN
+ 0.4 10 V
OUT
+ 0.6 10 V
OUT
TEMPERATURE RANGE
Specified Range T Operating Range T Storage Range T
J J A
40 +85 °C55 +125 °C65 +150 °C
Thermal Resistance
SOT23-5 Surface Mount SO-8 Surface Mount
θ
JA
θ
JA
Junction-to-Ambient 200 °C/W Junction-to-Ambient 150 °C/W
NOTES: (1) The REG101 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at V
load.
= V
(3) Current limit is the output current that produces a 10% change in output voltage from V (4) For V (5) The REG101 no longer regulates when V
> 6.5V, see typical characteristic “I
ENABLE
vs V
ENABLE
< V
+ V
IN
OUT
DROP (MAX)
.
ENABLE
. In drop-out, the impedance from VIN to V
+ 1V and I
IN
OUT
= 2mA.
OUT
is typically less than 1 at TJ = +25°C.
OUT
(1)
= 0.1µF
, unless otherwise noted.
REG101NA REG101UA
1.267 V
0.2 1 µA
±2.2 %
±0.8 ±2.0 %
OUT
OUT
60 mA
IN
1 100 nA
= V
IN
µVrms µVrms
+ 1V at fixed
OUT
V
REG101
SBVS026D
3
TYPICAL CHARACTERISTICS
For all models, at TJ = +25°C and V
= 1.8V, unless otherwise noted.
ENABLE
OUTPUT VOLTAGE CHANGE vs I
(V
= V
+ 1V, Output Voltage % Change
IN
OUT
0.80
Referred to I
= 50mA at +25°C)
OUT
0.60
0.40
0.20
+25°C
0.00
0.200.40
Output Voltage Change (%)
0.60
55°C
0.80
2004010 30 6050 70 80 90 100
I
(mA)
OUT
LINE REGULATION
20
(Referred to V
= V
+ 1V at I
IN
OUT
15 10
5 0
I
OUT
= 2mA
I
OUT
= 50mA
5
10
Output Voltage Change (mV)
–15
I
OUT
= 100mA
–20
012345 867
VIN – V
OUT
(V)
= 50mA)
OUT
OUT
+125°C
LOAD REGULATION vs TEMPERATURE
(V
= V
+ 1V)
IN
OUT
0.0%
–0.1%
10mA < I
< 100mA
OUT
0.2%
0.3%
Output Voltage Change (%)
2mA < I
< 1000mA
OUT
0.4%
2550 0 7525 50 100 125
Temperature (°C)
LINE REGULATION vs TEMPERATURE
0.10 I
= 100mA
OUT
0.08
0.06
0.04
0.02
0.00
(V
+ 1V) < VIN < 10V
OUT
0.020.040.06
Output Voltage Change (%)
0.080.10
(V
+ 0.4V) < VIN < 10V
OUT
–50 –25 0 25 50 75 100 125
Temperature (°C)
100
80
60
40
DC Dropout Voltage (mV)
20
0
0 10 100
4
DC DROPOUT VOLTAGE vs I
OUT
+125°C
+25°C
–55°C
20 30 40 50 60 70 80 90
I
(mA)
OUT
100
DC DROPOUT VOLTAGE vs TEMPERATURE
I
= 100mA
OUT
80
60
40
DC Dropout Voltage (mV)
20
0
–50 1251007550250–25
Temperature (°C)
REG101
SBVS026D
TYPICAL CHARACTERISTICS (Cont.)
0
10
20
30
40
50
60
70
80
90
100
5
15
25
35
45
55
65
75
85
95
30
25
20
15
10
5
0
Percentage of Units (%)
V
OUT
Drift (ppm/°C)
OUTPUT VOLTAGE DRIFT HISTOGRAM
–50 –25 0 25 50 75 125100
600 575 550 525 500 475 450 425 400
I
GND
(µA)
Temperature (°C)
GROUND PIN CURRENT vs TEMPERATURE
I
OUT
= 100mA
V
OUT
= 5V
V
OUT
= 3.3V
V
OUT
= 2.5V
VIN = V
OUT
+ 1V
For all models, at TJ = +25°C and V
= 1.8V, unless otherwise noted.
ENABLE
18
OUTPUT VOLTAGE ACCURACY HISTOGRAM
16 14 12 10
8 6
Percentage of Units (%)
4 2 0
0.0
0.2
1.0
0.8
0.6
0.4
0.2
0.4
Error (%)
OUTPUT VOLTAGE vs TEMPERATURE
(Output Voltage % Change Referred
to I
= 50mA at +25°C)
0.50
OUT
0.40
0.30
0.20
I
OUT
= 2mA
0.10
0.00
0.100.200.30
Output Voltage Change (%)
–0.40
I
OUT
= 100mA
0.50
50 2525 0 50 75 100 125
Temperature (°C)
I
OUT
0.6
= 50mA
0.8
1.0
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
1µ
V
= 0.5V
ENABLE
V
+ 1V
= V
IN
OUT
100n
(A)
10n
GND
I
1n
100p
–50 25–25 0 50 75 100 125
Temperature (°C)
600
GROUND PIN CURRENT vs I
V
= 5.0V
500
OUT
400
(µA)
300
GND
I
200
100
0
REG101
SBVS026D
VIN = V
OUT
+ 1V
0203010 5040 7060 9080 100
OUT
V
= 3.3V
OUT
V
= 2.5V
OUT
I
(mA)
OUT
5
TTYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and V
= 1.8V, unless otherwise noted.
ENABLE
80
RIPPLE REJECTION vs FREQUENCY
I
= 2mA
I
OUT
OUT
= 100mA
C
I
OUT
OUT
= 2mA
= 10µF
70 60 50 40 30
Ripple Rejection (dB)
20 10
C
= 0µF
OUT
0
10 100 1k 10k 100k 10M1M
Frequency (Hz)
RMS NOISE VOLTAGE vs C
60
REG101-5.0
50
40
REG101-3.3
30
20
REG101-2.5
Noise Voltage (µVrms)
10
CNR = 0.01µF
10Hz < BW < 100kHz
0
0.1
110
C
(µF)
OUT
I
C
OUT
OUT
OUT
= 100mA
= 10µF
30
RIPPLE REJECTION vs (V
– V
IN
REG101-3.3
25
20
15
10
Ripple Rejection (dB)
5
0
Frequency = 100kHz
C
I
OUT
0 0.1 0.40.2 0.3 0.5 0.6 0.7 10.8 0.9
VIN - V
OUT
(V)
RMS NOISE VOLTAGE vs C
110 100
90 80 70
REG101-3.3
REG101-2.5
REG101-5.0
60 50
Noise Voltage (µVrms)
40 30
CNR = 0µF
10Hz < BW < 100kHz
20
110 1k
100 10k
CNR (pF)
)
OUT
= 10µF
OUT
= 100mA
NR
10
I
= 100mA
OUT
C
= 0µF
NR
(µV/Hz)
N
e
1
0.1
C
C
= 0µF
OUT
C
0.01 10 100 1k 10k 100k
OUT
OUT
= 1µF
= 10µF
10
I
= 100mA
OUT
C
= 0.01µF
NR
1
(µV/Hz)
N
e
0.1
0.01 10 100 1k 10k 100k
Frequency (Hz)
6
NOISE SPECTRAL DENSITY
NOISE SPECTRAL DENSITY
C
Frequency (Hz)
OUT
C
= 0µF
C
= 1µF
OUT
= 10µF
OUT
REG101
SBVS026D
TYPICAL CHARACTERISTICS (Cont.)
–50 –25
I
SC
125
180
160
140
120
100
80
60
40
I
OUT
(mA)
Temperature (°C)
CURRENT LIMIT vs TEMPERATURE
I
CL
0 25 50 75 100
V
IN = VOUT
+ 1V
LINE TRANSIENT RESPONSE
50µs/div
5.3V
50mV/div50mV/div
V
IN
V
OUT
V
OUT
4.3V
REG101-3.3
I
OUT
= 100mA
C
OUT
= 0
C
OUT
= 10µF
TURN-OFF
200µs/div
1V/div1V/div
V
ENABLE
V
OUT
REG101-3.3
C
NR
= 0.01µF
C
OUT
= 0µF
R
LOAD
= 1600
C
OUT
= 10µF
R
LOAD
= 33
C
OUT
= 1.0µF
R
LOAD
= 33
For all models, at TJ = +25°C and V
= 1.8V, unless otherwise noted.
ENABLE
3.5
FOLDBACK CURRENT LIMIT
3.0
REG101-3.3
2.5
2.0
1.5
Output Voltage (V)
1.0
0.5
I
SC
0
04020 140 160
80 100 12060 180
Output Current (mA)
LOAD TRANSIENT RESPONSE
REG101-3.3
V
= 4.3V
IN
200mV/div200mV/div
I
CL
C
= 0µF
OUT
V
OUT
100mA
10mA
R
1V/div1V/div
REG101
SBVS026D
C
= 0µF
OUT
= 1600
LOAD
10µs/div
TURN-ON
250µs/div
C
R
OUT LOAD
C
OUT
= 10µF
= 33
= 10µF
C
OUT
R
LOAD
REG101-3.3
V
= V
IN
OUT
C
= 0.01µF
NR
= 0µF
= 33
+ 1V
V
OUT
I
OUT
V
OUT
V
ENABLE
7
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and V
I
10µ
ENABLE
1µ
(A)
100n
ENABLE
I
T = +125°C
T = +25°C
10n
T = –55°C
1n
678910
= 1.8V, unless otherwise noted.
ENABLE
vs V
ENABLE
V
(V)
ENABLE
V
OUT
R
LOAD
500mV/div
V
POWER UP/POWER DOWN
= 3.0V
= 30
V
IN
OUT
1s/div
(µVrms)
n
V
200mV/div
200mV/div
100mA
10mA
80
RMS NOISE VOLTAGE vs C
70
60
10Hz < frequency < 100kHz
ADJ
REG101–A
= 3.3V
V
OUT
= 0.1µF
C
OUT
50
40
30
20
10 100 1k 10k 100k
C
(pF)
ADJ
LOAD TRANSIENT-ADJUSTABLE VERSION
C
= 0
OUT
C
= 10µF
OUT
REG101–A
= 4.3V
V
IN
= 3.3V
V
OUT
V
V
I
OUT
OUT
OUT
0.350
0.300
0.250
0.200
(µA)
ADJ
0.150
I
0.100
0.050
0.000
50mV/div
50mV/div
5.3V
4.3V
ADJUST PIN CURRENT vs TEMPERATURE
–50 –25 0 25 50 75 100 125
Temperature (°C)
LINE TRANSIENT-ADJUSTABLE VERSION
C
= 0
OUT
= 10µF
C
OUT
REG101–A
= 100mA
I
OUT
= 0.01µF
C
FB
= 3.3V
V
OUT
V
OUT
V
OUT
V
IN
8
REG101
SBVS026D
BASIC OPERATION
04020 140 160
80 100 12060 180
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Output Voltage (V)
Output Current (mA)
FOLDBACK CURRENT LIMIT
I
CL
I
CL
REG101-3.3
The REG101 series of LDO (Low Drop-Out) linear regula­tors offers a wide selection of fixed output voltage versions and an adjustable output version. The REG101 belongs to a family of new generation LDO regulators that utilize a DMOS pass transistor to achieve ultra-low dropout perfor­mance and freedom from output capacitor constraints. Ground pin current remains under 650µA over all line, load, and temperature conditions. All versions have thermal and over­current protection, including foldback current limit.
The REG101 does not require an output capacitor for regu­lator stability and is stable over most output currents and with almost any value and type of output capacitor up to 10µF or more. For applications where the regulator output current drops below several milliamps, stability can be enhanced by: adding a 1k to 2k load resistor; using capacitance values less than 10µF; or keeping the effective series resistance greater than 0.05 including the capacitor’s ESR and parasitic resistance in printed circuit board traces, solder joints, and sockets.
Although an input capacitor is not required, it is good analog design practice to connect a 0.1µF low ESR capacitor across
the input supply voltage. This is recommended to improve ripple rejection by reducing input voltage ripple.
Figure 1 shows the basic circuit connections for the fixed voltage models. Figure 2 gives the connections for the adjustable output version (REG101A) and example resistor values for some commonly used output voltages. Values for other voltages can be calculated from the equation shown in Figure 2.
INTERNAL CURRENT LIMIT
The REG101 internal current limit has a typical value of 170mA. A foldback feature limits the short-circuit current to a typical short-circuit value of 60mA. This helps to protect the regulator from damage under all load conditions. A characteristic of V
OUT
versus I
is given in Figure 3 and
OUT
in the Typical Characteristics section.
V
IN
0.1µF
FIGURE 1. Fixed Voltage Nominal Circuit for REG101.
1
To reduce current through divider, increase resistor values (see table at right).
As the impedance of the resistor divider increases, I
(~200nA) may introduce an error.
ADJ
C
improves noise and transient response.
FB
V
IN
0.1µF
Pin numbers for SOT23 package.
FIGURE 2. Adjustable Voltage Circuit for REG101A.
REG101
SBVS026D
Enable
REG101
In Out
Gnd NR
Enable
3
REG101
2
Gnd
V
= (1 + R1/R2) 1.267V
OUT
C
NR
0.01µF
Optional
5
4
I
ADJ
V
OUT
C
OUT
FIGURE 3. Foldback Current Limit of the REG101-3.3 at
25°C.
EXAMPLE RESISTOR VALUES
V
(V) R1 (W)
OUT
2.5 11.3k 11.5k
3.0 15.8k 11.5k
3.3 18.7k 11.5k
5.0 34.0k 11.5k
NOTE: (1) Resistors are standard 1% values.
(1)
1.13k 1.15k
1.58k 1.15k
1.87k 1.15k
3.40k 1.15k
R2 (Ω)
(1)
R
Adj R
V
OUT
C
FB
1
0.01µF
2
C
OUT
Optional
Load
9
ENABLE
The Enable pin is active HIGH and compatible with stan­dard TTL-CMOS levels. Inputs below 0.5V (max) turn the regulator off and all circuitry is disabled. Under this condi­tion, ground pin current drops to approximately 10nA. When a pull-up resistor is used, and operation down to VIN = 1.8V is required, use values < 50kΩ.
OUTPUT NOISE
A precision band-gap reference is used for the internal reference voltage, V
. This reference is the dominant
REF
noise source within the REG101 and it generates approxi­mately 29µVrms in the 10Hz to 100kHz bandwidth at the reference output. The regulator control loop gains up the reference noise, so that the noise voltage of the regulator is approximately given by:
V = 29 Vrms
µµ
N
Since the value of V
R+R
1 2 OUT
= 29
R2
is 1.267V, this relationship reduces to:
REF
Vrms
V=23
µ
N OUT
V
V
Vrms•
V V
REF
Connecting a capacitor, CNR, from the Noise Reduction (NR) pin to ground, as shown in Figure 4, forms a low-pass filter for the voltage reference. For C
= 10nF, the total noise in the
NR
10Hz to 100kHz bandwidth is reduced by approximately a factor of 2.8 for VO = 3.3V. This noise reduction effect is shown in Figure 5 and as “RMS Noise Voltage vs CNR” in the Typical Characteristics section.
Noise can be further reduced by carefully choosing an output capacitor, C
. Best overall noise performance is
OUT
110 100
90
REG101-3.3
80 70 60 50
Noise Voltage (µVrms)
40 30
10Hz < BW < 100kHz
20
110 1k
RMS NOISE VOLTAGE vs C
REG101-5.0
REG101-2.5
CNR = 0µF
100 10k
CNR (pF)
NR
FIGURE 5. Output Noise versus Noise Reduction Capacitor.
achieved with very low (< 0.22µF) or very high (> 2.2µF) values of C
. See “RMS Noise Voltage vs C
OUT
OUT
” in the
Typical Characteristics section. The REG101 utilizes an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the DMOS pass element above V
. The charge-pump switch-
IN
ing noise (nominal switching frequency = 2MHz) is not measurable at the output of the regulator over most values of C
OUT
and I
OUT
.
The REG101 adjustable version does not have the noise­reduction pin available, however, the adjust pin is the sum­ming junction of the error amplifier. A capacitor, CFB, connected from the output to the adjust pin will reduce both the output noise and the peak error from a load transient. See the typical characteristics for output noise performance.
NR
(fixed output
versions only)
C
NR
(optional)
Enable
FIGURE 4. Block Diagram.
10
V
REF
(1.26V)
Low Noise
Charge Pump
Over Current
Over Temp
Protection
V
IN
DMOS Pass Transistor
REG101
V
OUT
R
1
Adj
(Adjustable
R
Versions)
2
NOTE: R1 and R2 are internal on fixed output versions.
REG101
SBVS026D
DROP-OUT VOLTAGE
The REG101 uses an N-channel DMOS as the “pass” element. When the input voltage is within a few tens of millivolts of the output voltage, the DMOS device behaves like a resistor. Therefore, for low values of V
IN
to V
OUT
, the
regulator’s input-to-output resistance is the RdsON of the DMOS pass element (typically 600mΩ). For static (DC) loads, the REG101 will typically maintain regulation down to V
IN
to V
voltage drop of 60mV at full rated output
OUT
current. In Figure 6, the bottom line (DC dropout) shows the minimum VIN to V
voltage drop required to prevent
OUT
drop-out under DC load conditions. For large step changes in load current, the REG101 requires
a larger voltage drop across it to avoid degraded transient response. The boundary of this “transient drop-out” region is shown as the top line in Figure 6. Values of VIN to V
OUT
voltage drop above this line insure normal transient re­sponse.
In the transient dropout region between “DC” and “Tran­sient”, transient response recovery time increases. The time required to recover from a load transient is a function of both the magnitude and rate of the step change in load current and the available “headroom” VIN to V
voltage drop. Under
OUT
worst-case conditions (full-scale load change with VIN to V
voltage drop close to DC dropout levels), the REG101
OUT
can take several hundred microseconds to re-enter the speci­fied window of regulation.
140
120
100
80
60
40
Dropout Voltage (mV)
20
Full Scale I
Transient
OUT
DC
TRANSIENT RESPONSE
The REG101 response to transient line and load conditions improves at lower output voltages. The addition of a capaci­tor (nominal value 0.47µF) from the output pin to ground may improve the transient response. In the adjustable ver­sion, the addition of a capacitor, C
(nominal value 10nF),
FB
from the output to the adjust pin will also improve the transient response.
THERMAL PROTECTION
The REG101 has thermal shutdown circuitry that protects the regulator from damage. The thermal protection circuitry disables the output when the junction temperature reaches approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on various conditions, the thermal protection circuit may cycle on and off. This limits the dissipation of the regulator, but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be limited to 125°C, maximum. To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal protection is triggered. Use worst-case loads and signal conditions. For good reliability, thermal protection should trigger more than 35°C above the maximum expected ambient condition of your application. This produces a worst-case junction tem­perature of 125°C at the highest expected ambient tempera­ture and worst-case load.
The internal protection circuitry of the REG101 has been designed to protect against overload conditions. It was not intended to replace proper heat sinking. Continuously run­ning the REG101 into thermal shutdown will degrade reli­ability.
0
0 25 50 75 100 150125
(mA)
I
OUT
FIGURE 6. Transient and DC Dropout.
REG101
SBVS026D
11
POWER DISSIPATION
The REG101 is available in two different package configu­rations. The ability to remove heat from the die is different for each package type and, therefore, presents different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. While it is difficult to impossible to quantify all of the variables in a thermal design of this type, performance data for several configurations are shown in Figure 7.
Power dissipation depends on input voltage, load condition, and duty cycle. Power dissipation is equal to the product of the average output current times the voltage across the output element, VIN to V
voltage drop.
OUT
Power dissipation can be minimized by using the lowest possible input voltage necessary to assure the required output voltage.
REGULATOR MOUNTING
Solder pad footprint recommendations for the various REG101 devices are presented in the Application Bulletin AB-132, “Solder Pad Recommendations for Surface-Mount Devices” (SBFA015), available from the Texas Instruments web site (www.ti.com).
P=V –V I
()
D IN OUT OUT(AVG)
Power Dissipation (W)
1.2
1.0
0.8
0.6
0.4
0.3
0
0 25 50 75 100 125
Ambient Temperature (°C)
CONDITIONS
SOT23-5 SO-8
PACKAGE
SOT23-5 200°C/W
SO-8 150°C/W
θ
JA
FIGURE 7. Maximum Power Dissipation versus Ambient Temperature for the Various Packages.
12
REG101
SBVS026D
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable Device Status
REG101NA-2.5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-2.5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-2.5/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
REG101NA-2.5/3KG4 ACTIVE SOT-23 DBV 5 TBD Call TI Call TI
REG101NA-2.8/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-2.8/250G4 ACTIVE SOT-23 DBV 5 TBD Call TI Call TI
REG101NA-2.85/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-2.85/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
REG101NA-2.85/3KG4 ACTIVE SOT-23 DBV 5 TBD Call TI Call TI
REG101NA-3.3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-3.3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-3.3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
REG101NA-3.3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
REG101NA-3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
REG101NA-3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
REG101NA-3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Lead/Ball Finish
(6)
CU NIPDAU Level-1-260C-UNLIM RO1G
CU NIPDAU Level-1-260C-UNLIM RO1G
CU NIPDAU Level-1-260C-UNLIM RO1G
CU NIPDAU Level-1-260C-UNLIM RO1E
CU NIPDAU Level-1-260C-UNLIM RO1N
CU NIPDAU Level-1-260C-UNLIM RO1N
CU NIPDAU Level-1-260C-UNLIM RO1C
CU NIPDAU Level-1-260C-UNLIM RO1C
CU NIPDAU Level-1-260C-UNLIM RO1C
CU NIPDAU Level-1-260C-UNLIM RO1C
CU NIPDAU Level-1-260C-UNLIM R01D
CU NIPDAU Level-1-260C-UNLIM R01D
CU NIPDAU Level-1-260C-UNLIM R01D
CU NIPDAU Level-1-260C-UNLIM R01D
MSL Peak Temp
(3)
17-May-2014
Op Temp (°C) Device Marking
(4/5)
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
REG101NA-5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
CU NIPDAU Level-1-260C-UNLIM RO1B
& no Sb/Br)
REG101NA-5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1B
& no Sb/Br)
REG101NA-5/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1B
& no Sb/Br)
REG101NA-5/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1B
& no Sb/Br)
REG101NA-A/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1A
& no Sb/Br)
REG101NA-A/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1A
& no Sb/Br)
REG101NA-A/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1A
& no Sb/Br)
REG101NA-A/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
CU NIPDAU Level-1-260C-UNLIM RO1A
& no Sb/Br)
REG101NA2.85/250G4 ACTIVE SOT-23 DBV 5 TBD Call TI Call TI
REG101UA-2.5 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
REG101UA-2.5G4 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
REG101UA-2.8 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
REG101UA-2.8/2K5 OBSOLETE SOIC D 8 TBD Call TI Call TI REG
REG101UA-2.8/2K5G4 OBSOLETE SOIC D 8 TBD Call TI Call TI
REG101UA-2.85 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
REG101UA-2.85G4 ACTIVE SOIC D 8 TBD Call TI Call TI
17-May-2014
Samples
(4/5)
101U25
101U25
101U28
101U28
101285
REG101UA-2.8G4 ACTIVE SOIC D 8 TBD Call TI Call TI
REG101UA-3 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
REG101UA-3.3 ACTIVE SOIC D 8 75 Green (RoHS
CU NIPDAU Level-2-260C-1 YEAR REG
& no Sb/Br)
Addendum-Page 2
101U30
101U33
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
Package Type Package
(1)
Drawing
Pins Package
Qty
REG101UA-3.3/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
Eco Plan
(2)
& no Sb/Br)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
CU NIPDAU Level-2-260C-1 YEAR REG
101U33
17-May-2014
(4/5)
REG101UA-3.3/2K5G4 ACTIVE SOIC D 8 TBD Call TI Call TI
REG101UA-3.3G4 ACTIVE SOIC D 8 75 Green (RoHS
REG101UA-3G4 ACTIVE SOIC D 8 75 Green (RoHS
REG101UA-5 ACTIVE SOIC D 8 75 Green (RoHS
REG101UA-5/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
REG101UA-5/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS
REG101UA-5G4 ACTIVE SOIC D 8 75 Green (RoHS
REG101UA-A ACTIVE SOIC D 8 75 Green (RoHS
REG101UA-AG4 ACTIVE SOIC D 8 75 Green (RoHS
(1)
The marketing status values are defined as follows:
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR REG
101U33
CU NIPDAU Level-2-260C-1 YEAR REG
101U30
CU NIPDAU Level-2-260C-1 YEAR REG
101U50
CU NIPDAU Level-2-260C-1 YEAR REG
101U50
CU NIPDAU Level-2-260C-1 YEAR REG
101U50
CU NIPDAU Level-2-260C-1 YEAR REG
101U50
CU NIPDAU Level-2-260C-1 YEAR REG
101UA
CU NIPDAU Level-2-260C-1 YEAR REG
101UA
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Samples
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
17-May-2014
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
REG101NA-2.5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-2.5/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-2.8/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-2.85/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-2.85/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 REG101NA-3.3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-3.3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-5/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-A/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101NA-A/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG101UA-3.3/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
REG101UA-5/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Type
Package Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)B0(mm)K0(mm)P1(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
REG101NA-2.5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-2.5/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG101NA-2.8/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-2.85/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-2.85/3K SOT-23 DBV 5 3000 203.0 203.0 35.0 REG101NA-3.3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-3.3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG101NA-3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG101NA-5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-5/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG101NA-A/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG101NA-A/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG101UA-3.3/2K5 SOIC D 8 2500 367.0 367.0 35.0
REG101UA-5/2K5 SOIC D 8 2500 367.0 367.0 35.0
Pack Materials-Page 2
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