Datasheet PT6921C, PT6921N, PT6922A, PT6922C, PT6922N Datasheet (Texas Instruments)

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PT6920 Series
Standard Application
5V TO 3.3V/2.5V 25 WATT DUAL OUTPUT INTEGRATED SWITCHING REGULATOR
Ordering Information
PT6921
= +3.3 Volts
+2.5/+1.8 Volts
PT6922
= +3.3 Volts
+1.5 Volts
C1 = Req’d 560µF electrolytic C2 = Req’d 330µF electrolytic C3 = Optional 100µF electrolytic
Features
Dual Outputs:
+3.3V/6A +2.5V/2.2A or +1.8V/1.5A
Adjustable Output Voltage
Remote Sense (both outputs)
Standby Function
Over-Temperature Protection
Soft-Start
Internal Sequencing
23-pin SIPPackage
Pin Function
1V
1
Remote Sense
2 Do Not Connect 3 STBY 4V
in
5V
in
6V
in
7 GND 8 GND
9 GND 10 GND 11 GND 12 V
1out
Pin Function
13 V
1out
14 V
1out
15 V
1out
16 V
1
Adjust
17 Do Not Connect 18 V
2out
19 V
2out
20 V
2out
21 V
2out
22 V
2
Remote Sense
23 V
2
Adjust*
Pin-Out Information
The PT6920 is a new series of 25W dual output ISRs designed to power the latest generation DSP chips. Both out­put voltages are independently adjustable with external resistors. In addition, the second output voltage of the PT6921 can be selected for 2.5V or 1.8V to accom­modate the next generation of DSP chips. The internal power sequencing of both outputs meet the latest require­ments of TI’s ‘C6000 series DSPs.
(For dimensions and PC board layout, see Package Styles 1100 and 1110.)
PT6920
C2
+
GND
V1
OUT
V
IN
GND
4,5,6
7-11
12-15
18-21
16
C1
22
C3
+
23
1
V2
OUT
R1
R2
R3
R4
V2 Sense
V1 Sense
3
STBY
PT Series Suffix
(PT1234X)
Case/Pin Configuration
Vertical Through-Hole
N
Horizontal Through-Hole
A
Horizontal Surface Mount
C
Preliminary Specifications
Characteristics
PT6920 SERIES
(Ta= 25°C unless noted) Symbols Conditions Min Typ Max Units
Output Current I
o
Ta = +60°C, 200 LFM, pkg N V
1
= 3.3V 0.1 5.5 A
V
2
= 2.5V 0 2.2 A
V
2
= 1.8V 0 1.75 A
V
2
= 1.2V 0 1.2 A
Ta = +25°C, natural convection V
1
= 3.3V 0 .1 6.0 A
V
2
= 2.5V 0 2.2 A
V
2
= 1.8V 0 1.75 A
V
2
= 1.2V 0 1.2 A
Input Voltage Range V
in
0.1A ≤ I
o
≤ I
max
4.5 5.5 V
Output Voltage Tolerance ∆V
o
V
in
= +5V, Io = I
max,
both outputs
V
o-0.1 Vo+0.1 V
0°C Ta ≤ +65°C
Line Regulation Reg
line
4.5V ≤ V
in
≤ 5.5V, I
o
= I
max
V
1
= 3.3V ±7 ±17 mV
V
2
= 2.5V ±7 ±13 mV
Load Regulation Reg
load
Vin = +5V, 0.1 ≤ I
o
≤ I
max
V
1
= 3.3V ±17 ±33 mV
V
2
= 2.5V ±4 ±10 mV
V
o
Ripple/Noise V
n
V
in
= +5V, Io = I
max
V
1
= 3.3V 50 mV
V
2
= 2.5V 25 mV
Transient Response t
tr
Io step between 0.5xI
max
and I
max
25 µSec
with C
2
= 330µF V
os
Vo over/undershoot V
1
= 3.3V 60 mV
V
2
= 2.5V 60 mV
Efficiency η V
in
= +5V, Io = 4A total 75 %
Switching Frequency ƒ
o
4.5V V
in
5.5V
475
600 725
kHz
0.1A ≤ I
o
≤ I
max
Absolute Maximum T
a
0 +85 °C
Operating Temperature Range Recommended Operating T
a
Forced airflow = 200 LFM
0 +65 °C
Temperature Range Over V
in and Io
Ranges
Storage Temperature T
s
-40 +125 °C
Weight Vertical/Horizontal 29 grams
Note:
The PT6920 series requires a 56 0µF electrolytic capacitor on the input and a 330µF electrolytic capacitor on the output for proper operation in all applications.
* This product is the subject of one or more patents. Other patents pending.
Note: for PT6921 only:
with pin 23 open, V2out=2.5V with pin 23 shorted to pin 22, V2out=1.8V
Patent Pending*
Revised 3/9/99
Application Notes
Mechanical Outline
Product Selector Guide
For assistance or to order, call (800) 531-5782
Power Trends, Inc. 27715 Diehl Road, Warrenville, IL 60555 (800) 531-5782 Fax: (630) 393-6902 http://www.powertrends.com
CHARACTERISTIC DATA
PT6920 Series
Note 1:Note 1:
Note 1:Note 1:
Note 1: All data listed in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
PT6921, V2out = 2.5V, I2out = 2.2A (See Note 1)
Total Efficiency vs I1out
Total Power Dissipation vs I1out
Efficiency (%)PD (Watts)
I1out (A)
I1out (A)
Vin
Vin
30
40
50
60
70
80
90
0123456
Nat conv. 60LFM 200LFM
I1out (A)
Ta (°C)
Safe Operating Area vs I1out
Recommended Maximum
Operating Temperature
40
50
60
70
80
90
100
01234 56
4.5V
5.0V
5.5V
V1out Ripple vs I1out
Ripple (mV)
I1out (A)
0
2
4
6
8
10
0123456
4.5V
5.0V
5.5V
0
10
20
30
40
50
0123456
4.5V
5.0V
5.5V
Vin
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Application Notes
PT6920 Series
More Application Notes
Adjusting the Output Voltage of the PT6920 Dual Output Voltage ISR
Both output voltages from the Power Trends PT6920 series ISRs can be independantly adjusted higher or lower than their factory trimmed pre-set voltage. In each case only a single external resistor is required to adjust either V
1
(the voltage at
V
1
out, or V2 (the voltage at V2out). Table 1 gives the permis-
sible adjustment range for both V
1
and V2 for each model in the
series as V
a
(min) and V
a
(max). Note: V
2
must always be lower
than V
1
.
V1 Adjust Up: To increase the output, add a resistor R4 be­tween pin 16 (V
1
Adjust) and pins 7-11 (GND).
V
1
Adjust Down: Add a resistor (R3), between pin 16
(V
1
Adjust) and pin 1 (V1 Remote Sense).
V
2
Adjust Up: Add a resistor R2 between pin 23 (V2 Adjust)
and pins 7-11 (GND).
V
2
Adjust Down: Add a resistor (R1) between pin 23 (V2 Adjust)
and pin 22 (V
2
Remote Sense).
Refer to Figure 1 and Table 2 for both the placement and value of the required resistor.
Notes:
1. The voltage at V
1
out and V2out may be adjusted
independantly.
2. V
2
must always be at least 0.2V lower than V1.
3. If V
1
is increased above 3.3V, the minimum input voltage to the ISR must also be increased. The minimum required input voltage must be (V
1
+ 1.2)V or 4.5V, whichever is
greater. Do not exceed 6.0V
4. Use only a single 1% resistor in either the (R3) or R4 loca-
Table 1
PT6920 ADJUSTMENT RANGE AND FORMULA PARAMETERS
Output Bus V1 out V2 out Series Pt # PT6921/22 PT6921 PT6922 Adj. Resistor (R3)/R4 (R1)/R2 (R1)/R2
Vo(nom) 3.3V 2.5V 1.5 Va(min) 2.3V 1.8V 1.2 Va(max) 4.2V 3.0V 3.0 Ro (kΩ) 12.1 10.0 9.76 Rs (kΩ) 12.1 11.5 6.49
Figure 1
C1 330µF
+
C2 330µF
+
C3
100µF
+
R4
(R3) (R1)
R2
L O A D
L O A D
Adj Down
Adjust Up
Vin
COM COM
V2
out
V1
out
PT6920
18 - 21
237 - 11
4,5,6
Vin
V2
out
GND Vo2(adj)
V1(sns)
1
16
Vo1(adj)
12 - 15
V1
out
V2(sns)
22
STBY
3
Adjust V1
out
Adjust V2
out
tion to adjust V1, and in the (R1) or R2 location to adjust V2. Place the resistor as close to the ISR as possible.
5. Never connect capacitors to either the V
1
Adjust or
V
2
Adjust pins. Any capacitance added to these control pins
will affect the stability of the respective regulated output.
6. To comply with the ISRs power dissipation limits, changes made to either output voltage (V
1
or V2) may affect the maximum current available from both outputs. For more information, consult the related applications note, “Deter­mining the Maximum Output Current for the PT6920 Series Dual Output ISR.”
The adjust up and adjust down resistor values can also be calcu­lated using the following formulae. Be sure to select the correct formula parameter from Table 1 for the output and model being adjusted.
(R1)/(R3) =
R
o
(Va – 1)
– R
s
k
V
o
– V
a
R2/R4 =
R
o
– R
s
k
V
a
– V
o
Where: Vo= Original output voltage, (V1 or V2)
V
a
= Adjusted output voltage
R
o
= The resistance value from Table 1
R
s
= The series resistance from Table 1
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Application
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Notes
PT6920 Series
Table 2
PT6920 ADJUSTMENT RESISTOR VALUES
Output Bus V1 out V2 out Series Pt # PT6921/22 PT6921 PT6922 Adj Resistor (R3)/R4 (R1)/R2 (R1)/R2 Vo(nom) 3.3Vdc 2.5Vdc 1.5Vdc
Va(req’d)
1.2 (0.0)k
1.25 (3.3)k
1.3 (8.2)k
1.35 (16.3)k
1.4 (32.6)k
1.45 (81.4)k
1.5
1.55 189.0k
1.6 91.1k
1.65 58.6k
1.7 42.3k
1.75 32.6k
1.8 (0.0)k 26.0k
1.85 (1.6)k 21.4k
1.9 (3.5)k 17.9k
1.95 (5.8)k 15.2k
2.0 (8.5)k 13.0k
2.05 (11.8)k 11.3k
2.1 (16.0)k 9.8k
2.15 (21.4)k 8.5k
2.2 (28.5)k 7.5k
2.25 (38.5)k 6.5k
2.3 (3.6)k (53.5)k 5.7k
2.35 (5.1)k (78.5)k 5.0k
2.4 (6.7)k (129.0)k 4.4k
2.45 (8.5)k (279.0)k 3.8k
2.5 (10.6)k 3.3k
2.55 (12.9)k 189.0k 2.8k
2.6 (15.6)k 88.5k 2.4k
2.65 (18.6)k 55.2k 2.0k
2.7 (22.2)k 38.5k 1.6k
2.75 (26.4)k 28.5k 1.3k
2.8 (31.5)k 21.8k 1.0k
2.85 (37.6)k 17.1k 0.7k
2.9 (45.4)k 13.5k 0.5k
2.95 (55.3)k 10.7k 0.2k
3.0 (68.6)k 8.5k 0.0k
3.05 (87.1)k
3.1 (115.0)k
3.15 (161.0)k
3.2 (254.0)k
3.25 (532.0)k
3.3
3.4 109.0k
3.5 48.4k
3.6 28.2k
3.7 18.2k
3.8 12.1k
3.9 8.1k
4.0 5.2k
4.1 3.0k
4.2 1.3k
R1/R3 = (Red) R2/R4 = Black
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